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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: marex@denx.de, Peter Maydell <peter.maydell@linaro.org>,
	crwulff@gmail.com
Subject: [PATCH v3 9/9] target/nios2: Use pc_next for pc + 4
Date: Mon, 28 Jun 2021 15:08:10 -0700	[thread overview]
Message-ID: <20210628220810.2919600-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210628220810.2919600-1-richard.henderson@linaro.org>

We have pre-computed the next instruction address into
dc->base.pc_next, so we might as well use it.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/nios2/translate.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index abc7e5f96a..930f3d3395 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -211,7 +211,7 @@ static void jmpi(DisasContext *dc, uint32_t code, uint32_t flags)
 
 static void call(DisasContext *dc, uint32_t code, uint32_t flags)
 {
-    tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4);
+    tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next);
     jmpi(dc, code, flags);
 }
 
@@ -265,7 +265,7 @@ static void br(DisasContext *dc, uint32_t code, uint32_t flags)
 {
     I_TYPE(instr, code);
 
-    gen_goto_tb(dc, 0, dc->pc + 4 + (instr.imm16.s & -4));
+    gen_goto_tb(dc, 0, dc->base.pc_next + (instr.imm16.s & -4));
     dc->base.is_jmp = DISAS_NORETURN;
 }
 
@@ -275,9 +275,9 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags)
 
     TCGLabel *l1 = gen_new_label();
     tcg_gen_brcond_tl(flags, cpu_R[instr.a], cpu_R[instr.b], l1);
-    gen_goto_tb(dc, 0, dc->pc + 4);
+    gen_goto_tb(dc, 0, dc->base.pc_next);
     gen_set_label(l1);
-    gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16.s & -4));
+    gen_goto_tb(dc, 1, dc->base.pc_next + (instr.imm16.s & -4));
     dc->base.is_jmp = DISAS_NORETURN;
 }
 
@@ -435,7 +435,7 @@ static void nextpc(DisasContext *dc, uint32_t code, uint32_t flags)
     R_TYPE(instr, code);
 
     if (likely(instr.c != R_ZERO)) {
-        tcg_gen_movi_tl(cpu_R[instr.c], dc->pc + 4);
+        tcg_gen_movi_tl(cpu_R[instr.c], dc->base.pc_next);
     }
 }
 
@@ -448,7 +448,7 @@ static void callr(DisasContext *dc, uint32_t code, uint32_t flags)
     R_TYPE(instr, code);
 
     tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a));
-    tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4);
+    tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next);
 
     dc->base.is_jmp = DISAS_JUMP;
 }
-- 
2.25.1



  parent reply	other threads:[~2021-06-28 22:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-28 22:08 [PATCH v3 0/9] target/nios2: Convert to TranslatorOps Richard Henderson
2021-06-28 22:08 ` [PATCH v3 1/9] target/nios2: Replace DISAS_TB_JUMP with DISAS_NORETURN Richard Henderson
2021-06-28 22:08 ` [PATCH v3 2/9] target/nios2: Use global cpu_env Richard Henderson
2021-06-28 22:08 ` [PATCH v3 3/9] target/nios2: Use global cpu_R Richard Henderson
2021-06-28 22:08 ` [PATCH v3 4/9] target/nios2: Add DisasContextBase to DisasContext Richard Henderson
2021-06-29  9:18   ` Peter Maydell
2021-06-28 22:08 ` [PATCH v3 5/9] target/nios2: Convert to TranslatorOps Richard Henderson
2021-06-29  9:21   ` Peter Maydell
2021-06-28 22:08 ` [PATCH v3 6/9] target/nios2: Remove assignment to env in handle_instruction Richard Henderson
2021-06-29  9:22   ` Peter Maydell
2021-06-28 22:08 ` [PATCH v3 7/9] target/nios2: Clean up goto " Richard Henderson
2021-06-29  9:22   ` Peter Maydell
2021-06-28 22:08 ` [PATCH v3 8/9] target/nios2: Inline handle_instruction Richard Henderson
2021-06-29  9:27   ` Peter Maydell
2021-06-29 13:53     ` Richard Henderson
2021-06-29 13:55       ` Peter Maydell
2021-06-28 22:08 ` Richard Henderson [this message]
2021-06-29  9:27   ` [PATCH v3 9/9] target/nios2: Use pc_next for pc + 4 Peter Maydell
2021-06-29 17:12 ` [PATCH v3 0/9] target/nios2: Convert to TranslatorOps Richard Henderson

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