From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, etnaviv@lists.freedesktop.org, Russell King <linux+etnaviv@armlinux.org.uk>, Daniel Vetter <daniel.vetter@intel.com> Subject: [PATCH v3 17/20] drm/etnaviv: Don't break exclusive fence ordering Date: Thu, 8 Jul 2021 19:37:51 +0200 [thread overview] Message-ID: <20210708173754.3877540-18-daniel.vetter@ffwll.ch> (raw) In-Reply-To: <20210708173754.3877540-1-daniel.vetter@ffwll.ch> There's only one exclusive slot, and we must not break the ordering. Adding a new exclusive fence drops all previous fences from the dma_resv. To avoid violating the signalling order we err on the side of over-synchronizing by waiting for the existing fences, even if userspace asked us to ignore them. A better fix would be to us a dma_fence_chain or _array like e.g. amdgpu now uses, but it probably makes sense to lift this into dma-resv.c code as a proper concept, so that drivers don't have to hack up their own solution each on their own. Hence go with the simple fix for now. Another option is the fence import ioctl from Jason: https://lore.kernel.org/dri-devel/20210610210925.642582-7-jason@jlekstrand.net/ v2: Improve commit message per Lucas' suggestion. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: etnaviv@lists.freedesktop.org --- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c index 5b97ce1299ad..07454db4b150 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c @@ -178,18 +178,20 @@ static int submit_fence_sync(struct etnaviv_gem_submit *submit) for (i = 0; i < submit->nr_bos; i++) { struct etnaviv_gem_submit_bo *bo = &submit->bos[i]; struct dma_resv *robj = bo->obj->base.resv; + bool write = bo->flags & ETNA_SUBMIT_BO_WRITE; - if (!(bo->flags & ETNA_SUBMIT_BO_WRITE)) { + if (!(write)) { ret = dma_resv_reserve_shared(robj, 1); if (ret) return ret; } - if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT) + /* exclusive fences must be ordered */ + if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT && !write) continue; ret = drm_sched_job_await_implicit(&submit->sched_job, &bo->obj->base, - bo->flags & ETNA_SUBMIT_BO_WRITE); + write); if (ret) return ret; } -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>, etnaviv@lists.freedesktop.org, Christian Gmeiner <christian.gmeiner@gmail.com>, Russell King <linux+etnaviv@armlinux.org.uk>, Daniel Vetter <daniel.vetter@intel.com>, Lucas Stach <l.stach@pengutronix.de> Subject: [Intel-gfx] [PATCH v3 17/20] drm/etnaviv: Don't break exclusive fence ordering Date: Thu, 8 Jul 2021 19:37:51 +0200 [thread overview] Message-ID: <20210708173754.3877540-18-daniel.vetter@ffwll.ch> (raw) In-Reply-To: <20210708173754.3877540-1-daniel.vetter@ffwll.ch> There's only one exclusive slot, and we must not break the ordering. Adding a new exclusive fence drops all previous fences from the dma_resv. To avoid violating the signalling order we err on the side of over-synchronizing by waiting for the existing fences, even if userspace asked us to ignore them. A better fix would be to us a dma_fence_chain or _array like e.g. amdgpu now uses, but it probably makes sense to lift this into dma-resv.c code as a proper concept, so that drivers don't have to hack up their own solution each on their own. Hence go with the simple fix for now. Another option is the fence import ioctl from Jason: https://lore.kernel.org/dri-devel/20210610210925.642582-7-jason@jlekstrand.net/ v2: Improve commit message per Lucas' suggestion. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: etnaviv@lists.freedesktop.org --- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c index 5b97ce1299ad..07454db4b150 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c @@ -178,18 +178,20 @@ static int submit_fence_sync(struct etnaviv_gem_submit *submit) for (i = 0; i < submit->nr_bos; i++) { struct etnaviv_gem_submit_bo *bo = &submit->bos[i]; struct dma_resv *robj = bo->obj->base.resv; + bool write = bo->flags & ETNA_SUBMIT_BO_WRITE; - if (!(bo->flags & ETNA_SUBMIT_BO_WRITE)) { + if (!(write)) { ret = dma_resv_reserve_shared(robj, 1); if (ret) return ret; } - if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT) + /* exclusive fences must be ordered */ + if (submit->flags & ETNA_SUBMIT_NO_IMPLICIT && !write) continue; ret = drm_sched_job_await_implicit(&submit->sched_job, &bo->obj->base, - bo->flags & ETNA_SUBMIT_BO_WRITE); + write); if (ret) return ret; } -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-07-08 17:38 UTC|newest] Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-08 17:37 [PATCH v3 00/20] drm/sched dependency tracking and dma-resv fixes Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 01/20] drm/sched: entity->rq selection cannot fail Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-09 6:53 ` Christian König 2021-07-09 6:53 ` [Intel-gfx] " Christian König 2021-07-09 7:14 ` Daniel Vetter 2021-07-09 7:14 ` [Intel-gfx] " Daniel Vetter 2021-07-09 7:23 ` Christian König 2021-07-09 7:23 ` [Intel-gfx] " Christian König 2021-07-09 8:00 ` Daniel Vetter 2021-07-09 8:00 ` [Intel-gfx] " Daniel Vetter 2021-07-09 8:11 ` Christian König 2021-07-09 8:11 ` [Intel-gfx] " Christian König 2021-07-08 17:37 ` [PATCH v3 02/20] drm/sched: Split drm_sched_job_init Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 03/20] drm/sched: Barriers are needed for entity->last_scheduled Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 18:56 ` Andrey Grodzovsky 2021-07-08 18:56 ` [Intel-gfx] " Andrey Grodzovsky 2021-07-08 19:53 ` Daniel Vetter 2021-07-08 19:53 ` [Intel-gfx] " Daniel Vetter 2021-07-08 21:54 ` [PATCH] " Daniel Vetter 2021-07-08 21:54 ` [Intel-gfx] " Daniel Vetter 2021-07-09 6:57 ` Christian König 2021-07-09 6:57 ` [Intel-gfx] " Christian König 2021-07-09 7:40 ` Daniel Vetter 2021-07-09 7:40 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 04/20] drm/sched: Add dependency tracking Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 05/20] drm/sched: drop entity parameter from drm_sched_push_job Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 06/20] drm/sched: improve docs around drm_sched_entity Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 07/20] drm/panfrost: use scheduler dependency tracking Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-12 9:19 ` Steven Price 2021-07-12 9:19 ` [Intel-gfx] " Steven Price 2021-07-12 9:19 ` Steven Price 2021-07-08 17:37 ` [PATCH v3 08/20] drm/lima: " Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 09/20] drm/v3d: Move drm_sched_job_init to v3d_job_init Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 10/20] drm/v3d: Use scheduler dependency handling Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 11/20] drm/etnaviv: " Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 12/20] drm/gem: Delete gem array fencing helpers Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 13/20] drm/sched: Don't store self-dependencies Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 14/20] drm/sched: Check locking in drm_sched_job_await_implicit Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 15/20] drm/msm: Don't break exclusive fence ordering Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 16/20] drm/msm: always wait for the exclusive fence Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-09 8:48 ` Christian König 2021-07-09 8:48 ` [Intel-gfx] " Christian König 2021-07-09 8:48 ` Christian König 2021-07-09 9:15 ` Daniel Vetter 2021-07-09 9:15 ` [Intel-gfx] " Daniel Vetter 2021-07-09 9:15 ` Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter [this message] 2021-07-08 17:37 ` [Intel-gfx] [PATCH v3 17/20] drm/etnaviv: Don't break exclusive fence ordering Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 18/20] drm/i915: delete exclude argument from i915_sw_fence_await_reservation Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 19/20] drm/i915: Don't break exclusive fence ordering Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` [PATCH v3 20/20] dma-resv: Give the docs a do-over Daniel Vetter 2021-07-08 17:37 ` [Intel-gfx] " Daniel Vetter 2021-07-08 17:37 ` Daniel Vetter 2021-07-09 0:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/sched dependency tracking and dma-resv fixes (rev2) Patchwork 2021-07-09 0:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-07-09 15:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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