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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: aik@ozlabs.ru, David Gibson <david@gibson.dropbear.id.au>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: [PULL 29/33] ppc/pegasos2: Implement some RTAS functions with VOF
Date: Fri,  9 Jul 2021 15:17:24 +1000	[thread overview]
Message-ID: <20210709051728.170203-30-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20210709051728.170203-1-david@gibson.dropbear.id.au>

From: BALATON Zoltan <balaton@eik.bme.hu>

Linux uses RTAS functions to access PCI devices so we need to provide
these with VOF. Implement some of the most important functions to
allow booting Linux with VOF. With this the board is now usable
without a binary ROM image and we can enable it by default as other
boards.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20210708215113.B3F747456E3@zero.eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 default-configs/devices/ppc-softmmu.mak |   2 +-
 hw/ppc/pegasos2.c                       | 137 ++++++++++++++++++++++++
 2 files changed, 138 insertions(+), 1 deletion(-)

diff --git a/default-configs/devices/ppc-softmmu.mak b/default-configs/devices/ppc-softmmu.mak
index c2d41198cd..4535993d8d 100644
--- a/default-configs/devices/ppc-softmmu.mak
+++ b/default-configs/devices/ppc-softmmu.mak
@@ -14,7 +14,7 @@ CONFIG_SAM460EX=y
 CONFIG_MAC_OLDWORLD=y
 CONFIG_MAC_NEWWORLD=y
 
-CONFIG_PEGASOS2=n
+CONFIG_PEGASOS2=y
 
 # For PReP
 CONFIG_PREP=y
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index cf1dc53c83..9a6ae867e4 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -43,6 +43,7 @@
 #define PROM_SIZE     0x80000
 
 #define KVMPPC_HCALL_BASE    0xf000
+#define KVMPPC_H_RTAS        (KVMPPC_HCALL_BASE + 0x0)
 #define KVMPPC_H_VOF_CLIENT  (KVMPPC_HCALL_BASE + 0x5)
 
 #define H_SUCCESS     0
@@ -195,6 +196,30 @@ static void pegasos2_init(MachineState *machine)
     }
 }
 
+static uint32_t pegasos2_pci_config_read(AddressSpace *as, int bus,
+                                         uint32_t addr, uint32_t len)
+{
+    hwaddr pcicfg = (bus ? 0xf1000c78 : 0xf1000cf8);
+    uint32_t val = 0xffffffff;
+
+    stl_le_phys(as, pcicfg, addr | BIT(31));
+    switch (len) {
+    case 4:
+        val = ldl_le_phys(as, pcicfg + 4);
+        break;
+    case 2:
+        val = lduw_le_phys(as, pcicfg + 4);
+        break;
+    case 1:
+        val = ldub_phys(as, pcicfg + 4);
+        break;
+    default:
+        qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid length\n", __func__);
+        break;
+    }
+    return val;
+}
+
 static void pegasos2_pci_config_write(AddressSpace *as, int bus, uint32_t addr,
                                       uint32_t len, uint32_t val)
 {
@@ -304,6 +329,87 @@ static void pegasos2_machine_reset(MachineState *machine)
     pm->cpu->vhyp = PPC_VIRTUAL_HYPERVISOR(machine);
 }
 
+enum pegasos2_rtas_tokens {
+    RTAS_RESTART_RTAS = 0,
+    RTAS_NVRAM_FETCH = 1,
+    RTAS_NVRAM_STORE = 2,
+    RTAS_GET_TIME_OF_DAY = 3,
+    RTAS_SET_TIME_OF_DAY = 4,
+    RTAS_EVENT_SCAN = 6,
+    RTAS_CHECK_EXCEPTION = 7,
+    RTAS_READ_PCI_CONFIG = 8,
+    RTAS_WRITE_PCI_CONFIG = 9,
+    RTAS_DISPLAY_CHARACTER = 10,
+    RTAS_SET_INDICATOR = 11,
+    RTAS_POWER_OFF = 17,
+    RTAS_SUSPEND = 18,
+    RTAS_HIBERNATE = 19,
+    RTAS_SYSTEM_REBOOT = 20,
+};
+
+static target_ulong pegasos2_rtas(PowerPCCPU *cpu, Pegasos2MachineState *pm,
+                                  target_ulong args_real)
+{
+    AddressSpace *as = CPU(cpu)->as;
+    uint32_t token = ldl_be_phys(as, args_real);
+    uint32_t nargs = ldl_be_phys(as, args_real + 4);
+    uint32_t nrets = ldl_be_phys(as, args_real + 8);
+    uint32_t args = args_real + 12;
+    uint32_t rets = args_real + 12 + nargs * 4;
+
+    if (nrets < 1) {
+        qemu_log_mask(LOG_GUEST_ERROR, "Too few return values in RTAS call\n");
+        return H_PARAMETER;
+    }
+    switch (token) {
+    case RTAS_READ_PCI_CONFIG:
+    {
+        uint32_t addr, len, val;
+
+        if (nargs != 2 || nrets != 2) {
+            stl_be_phys(as, rets, -1);
+            return H_PARAMETER;
+        }
+        addr = ldl_be_phys(as, args);
+        len = ldl_be_phys(as, args + 4);
+        val = pegasos2_pci_config_read(as, !(addr >> 24),
+                                       addr & 0x0fffffff, len);
+        stl_be_phys(as, rets, 0);
+        stl_be_phys(as, rets + 4, val);
+        return H_SUCCESS;
+    }
+    case RTAS_WRITE_PCI_CONFIG:
+    {
+        uint32_t addr, len, val;
+
+        if (nargs != 3 || nrets != 1) {
+            stl_be_phys(as, rets, -1);
+            return H_PARAMETER;
+        }
+        addr = ldl_be_phys(as, args);
+        len = ldl_be_phys(as, args + 4);
+        val = ldl_be_phys(as, args + 8);
+        pegasos2_pci_config_write(as, !(addr >> 24),
+                                  addr & 0x0fffffff, len, val);
+        stl_be_phys(as, rets, 0);
+        return H_SUCCESS;
+    }
+    case RTAS_DISPLAY_CHARACTER:
+        if (nargs != 1 || nrets != 1) {
+            stl_be_phys(as, rets, -1);
+            return H_PARAMETER;
+        }
+        qemu_log_mask(LOG_UNIMP, "%c", ldl_be_phys(as, args));
+        stl_be_phys(as, rets, 0);
+        return H_SUCCESS;
+    default:
+        qemu_log_mask(LOG_UNIMP, "Unknown RTAS token %u (args=%u, rets=%u)\n",
+                      token, nargs, nrets);
+        stl_be_phys(as, rets, 0);
+        return H_SUCCESS;
+    }
+}
+
 static void pegasos2_hypercall(PPCVirtualHypervisor *vhyp, PowerPCCPU *cpu)
 {
     Pegasos2MachineState *pm = PEGASOS2_MACHINE(vhyp);
@@ -315,6 +421,8 @@ static void pegasos2_hypercall(PPCVirtualHypervisor *vhyp, PowerPCCPU *cpu)
     if (msr_pr) {
         qemu_log_mask(LOG_GUEST_ERROR, "Hypercall made with MSR[PR]=1\n");
         env->gpr[3] = H_PRIVILEGE;
+    } else if (env->gpr[3] == KVMPPC_H_RTAS) {
+        env->gpr[3] = pegasos2_rtas(cpu, pm, env->gpr[4]);
     } else if (env->gpr[3] == KVMPPC_H_VOF_CLIENT) {
         int ret = vof_client_call(MACHINE(pm), pm->vof, pm->fdt_blob,
                                   env->gpr[4]);
@@ -687,6 +795,35 @@ static void *build_fdt(MachineState *machine, int *fdt_size)
     qemu_fdt_setprop_string(fdt, "/failsafe", "device_type", "serial");
     qemu_fdt_setprop_string(fdt, "/failsafe", "name", "failsafe");
 
+    qemu_fdt_add_subnode(fdt, "/rtas");
+    qemu_fdt_setprop_cell(fdt, "/rtas", "system-reboot", RTAS_SYSTEM_REBOOT);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "hibernate", RTAS_HIBERNATE);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "suspend", RTAS_SUSPEND);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "power-off", RTAS_POWER_OFF);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "set-indicator", RTAS_SET_INDICATOR);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "display-character",
+                          RTAS_DISPLAY_CHARACTER);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "write-pci-config",
+                          RTAS_WRITE_PCI_CONFIG);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "read-pci-config",
+                          RTAS_READ_PCI_CONFIG);
+    /* Pegasos2 firmware misspells check-exception and guests use that */
+    qemu_fdt_setprop_cell(fdt, "/rtas", "check-execption",
+                          RTAS_CHECK_EXCEPTION);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "event-scan", RTAS_EVENT_SCAN);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "set-time-of-day",
+                          RTAS_SET_TIME_OF_DAY);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "get-time-of-day",
+                          RTAS_GET_TIME_OF_DAY);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "nvram-store", RTAS_NVRAM_STORE);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "nvram-fetch", RTAS_NVRAM_FETCH);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "restart-rtas", RTAS_RESTART_RTAS);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-error-log-max", 0);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-event-scan-rate", 0);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-display-device", 0);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-size", 20);
+    qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-version", 1);
+
     /* cpus */
     qemu_fdt_add_subnode(fdt, "/cpus");
     qemu_fdt_setprop_cell(fdt, "/cpus", "#cpus", 1);
-- 
2.31.1



  parent reply	other threads:[~2021-07-09  5:52 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-09  5:16 [PULL 00/33] ppc-for-6.1 queue 20210709 David Gibson
2021-07-09  5:16 ` [PULL 01/33] target/ppc: Introduce ppc_interrupts_little_endian() David Gibson
2021-07-09  5:16 ` [PULL 02/33] target/ppc: Drop PowerPCCPUClass::interrupts_big_endian() David Gibson
2021-07-09  5:16 ` [PULL 03/33] spapr: tune rtas-size David Gibson
2021-07-09  5:16 ` [PULL 04/33] target/ppc: Remove PowerPCCPUClass.handle_mmu_fault David Gibson
2021-07-09  5:17 ` [PULL 05/33] target/ppc: Use MMUAccessType with *_handle_mmu_fault David Gibson
2021-07-09  5:17 ` [PULL 06/33] target/ppc: Push real-mode handling into ppc_radix64_xlate David Gibson
2021-07-09  5:17 ` [PULL 07/33] target/ppc: Use bool success for ppc_radix64_xlate David Gibson
2021-07-09  5:17 ` [PULL 08/33] target/ppc: Split out ppc_hash64_xlate David Gibson
2021-07-09  5:17 ` [PULL 09/33] target/ppc: Split out ppc_hash32_xlate David Gibson
2021-07-09  5:17 ` [PULL 10/33] target/ppc: Split out ppc_jumbo_xlate David Gibson
2021-07-09  5:17 ` [PULL 11/33] target/ppc: Introduce ppc_xlate David Gibson
2021-07-09  5:17 ` [PULL 12/33] target/ppc: Restrict ppc_cpu_tlb_fill to TCG David Gibson
2021-07-09  5:17 ` [PULL 13/33] target/ppc: Fix compilation with DUMP_PAGE_TABLES debug option David Gibson
2021-07-09  5:17 ` [PULL 14/33] target/ppc: Fix compilation with FLUSH_ALL_TLBS " David Gibson
2021-07-09  5:17 ` [PULL 15/33] target/ppc: Fix compilation with DEBUG_BATS " David Gibson
2021-07-09  5:17 ` [PULL 16/33] target/ppc: fix address translation bug for radix mmus David Gibson
2021-07-09  5:17 ` [PULL 17/33] target/ppc: changed ppc_hash64_xlate to use mmu_idx David Gibson
2021-07-09  5:17 ` [PULL 18/33] target/ppc: introduce mmu-books.h David Gibson
2021-07-09  5:17 ` [PULL 19/33] target/ppc: change ppc_hash32_xlate to use mmu_idx David Gibson
2021-07-09  5:17 ` [PULL 20/33] roms/u-boot: Bump ppce500 u-boot to v2021.07 to add eTSEC support David Gibson
2021-07-09  5:17 ` [PULL 21/33] docs/system: ppc: Update ppce500 documentation with " David Gibson
2021-07-09  5:17 ` [PULL 22/33] spapr: Implement Open Firmware client interface David Gibson
2021-07-13 11:01   ` Peter Maydell
2021-07-13 11:09   ` Peter Maydell
2022-03-31 18:02   ` Peter Maydell
2021-07-09  5:17 ` [PULL 23/33] target/ppc: mtmsrd is an illegal instruction on BookE David Gibson
2021-07-09  5:17 ` [PULL 24/33] ppc/pegasos2: Introduce Pegasos2MachineState structure David Gibson
2021-07-09  5:17 ` [PULL 25/33] target/ppc: Allow virtual hypervisor on CPU without HV David Gibson
2021-07-09  5:17 ` [PULL 26/33] target/ppc/spapr: Update H_GET_CPU_CHARACTERISTICS L1D cache flush bits David Gibson
2021-07-09  5:17 ` [PULL 27/33] ppc/pegasos2: Use Virtual Open Firmware as firmware replacement David Gibson
2021-07-09  5:17 ` [PULL 28/33] ppc/pegasos2: Fix use of && instead of & David Gibson
2021-07-09  5:17 ` David Gibson [this message]
2021-07-09  5:17 ` [PULL 30/33] target/ppc: Don't compile ppc_tlb_invalid_all without TCG David Gibson
2021-07-09  5:17 ` [PULL 31/33] spapr: Fix implementation of Open Firmware client interface David Gibson
2021-07-09  5:17 ` [PULL 32/33] linux-headers: Update David Gibson
2021-07-09  5:17 ` [PULL 33/33] target/ppc: Support for H_RPT_INVALIDATE hcall David Gibson
2021-07-10 18:54 ` [PULL 00/33] ppc-for-6.1 queue 20210709 Peter Maydell

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