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From: Daniel Kiss <daniel.kiss@arm.com>
To: coresight@lists.linaro.org
Cc: denik@google.com, leo.yan@linaro.org,
	linux-arm-kernel@lists.infradead.org, mathieu.poirier@linaro.org,
	mike.leach@linaro.org, suzuki.poulose@arm.com,
	Daniel Kiss <daniel.kiss@arm.com>,
	Branislav Rankov <Branislav.Rankov@arm.com>
Subject: [PATCHv2 2/4] coresight: tmc-etr: Track perf handler.
Date: Tue, 13 Jul 2021 14:15:30 +0200	[thread overview]
Message-ID: <20210713121532.836244-3-daniel.kiss@arm.com> (raw)
In-Reply-To: <20210713121532.836244-1-daniel.kiss@arm.com>

Keep track of the perf handler that is registred by the first tracer.
This will be used by the update call from polling.

Signed-off-by: Daniel Kiss <daniel.kiss@arm.com>
Signed-off-by: Branislav Rankov <Branislav.Rankov@arm.com>
---
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 ++++--
 drivers/hwtracing/coresight/coresight-tmc.h     | 2 ++
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 589bb2d56e802..55c9b5fd9f832 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1503,8 +1503,8 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 
 	spin_lock_irqsave(&drvdata->spinlock, flags);
 
-	/* Don't do anything if another tracer is using this sink */
-	if (atomic_read(csdev->refcnt) != 1) {
+	/* Serve only the tracer with the leading perf handler */
+	if (drvdata->perf_handle != handle) {
 		spin_unlock_irqrestore(&drvdata->spinlock, flags);
 		goto out;
 	}
@@ -1619,6 +1619,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
 		drvdata->pid = pid;
 		drvdata->mode = CS_MODE_PERF;
 		drvdata->perf_buf = etr_perf->etr_buf;
+		drvdata->perf_handle = handle;
 		atomic_inc(csdev->refcnt);
 	}
 
@@ -1666,6 +1667,7 @@ static int tmc_disable_etr_sink(struct coresight_device *csdev)
 	drvdata->mode = CS_MODE_DISABLED;
 	/* Reset perf specific data */
 	drvdata->perf_buf = NULL;
+	drvdata->perf_handle = NULL;
 
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index b91ec7dde7bc9..81583ffb973dc 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -184,6 +184,7 @@ struct etr_buf {
  * @idr_mutex:	Access serialisation for idr.
  * @sysfs_buf:	SYSFS buffer for ETR.
  * @perf_buf:	PERF buffer for ETR.
+ * @perf_handle: PERF handle for ETR.
  */
 struct tmc_drvdata {
 	void __iomem		*base;
@@ -207,6 +208,7 @@ struct tmc_drvdata {
 	struct mutex		idr_mutex;
 	struct etr_buf		*sysfs_buf;
 	struct etr_buf		*perf_buf;
+	struct perf_output_handle *perf_handle;
 };
 
 struct etr_buf_operations {
-- 
2.25.1


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  parent reply	other threads:[~2021-07-13 12:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-13 12:15 [PATCHv2 0/4] coresight: Add ETR-PERF polling Daniel Kiss
2021-07-13 12:15 ` [PATCHv2 1/4] coresight: tmc-etr: Use handle->head from perf_output_handle directly Daniel Kiss
2021-07-13 12:15 ` Daniel Kiss [this message]
2021-08-25 17:02   ` [PATCHv2 2/4] coresight: tmc-etr: Track perf handler Mathieu Poirier
2021-08-25 19:09     ` Mathieu Poirier
2021-07-13 12:15 ` [PATCHv2 3/4] coresight: etm-perf: Export etm_event_cpu_path Daniel Kiss
2021-07-13 12:15 ` [PATCHv2 4/4] coresight: Add ETR-PERF polling Daniel Kiss
2021-08-26 16:41   ` Mathieu Poirier
2021-08-26 17:32   ` Mathieu Poirier
2021-08-31 13:31     ` Mike Leach
2021-09-01 18:02       ` Mathieu Poirier

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