From: Suzuki K Poulose <suzuki.poulose@arm.com> To: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, tamas.zsoldos@arm.com, al.grant@arm.com, leo.yan@linaro.org, mike.leach@linaro.org, mathieu.poirier@linaro.org, suzuki.poulose@arm.com, anshuman.khandual@arm.com, jinlmao@qti.qualcomm.com Subject: [PATCH v2 10/10] coresight: trbe: Prohibit trace before disabling TRBE Date: Fri, 23 Jul 2021 13:46:11 +0100 [thread overview] Message-ID: <20210723124611.3828908-11-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210723124611.3828908-1-suzuki.poulose@arm.com> We must prohibit the CPU from tracing before we disable the TRBE and only re-enable it when we are sure the TRBE has been enabled back. Otherwise, leave the CPU in prohibited state. Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- .../hwtracing/coresight/coresight-self-hosted-trace.h | 4 +++- drivers/hwtracing/coresight/coresight-trbe.c | 9 +++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-self-hosted-trace.h b/drivers/hwtracing/coresight/coresight-self-hosted-trace.h index 586d26e0cba3..34372482a3cd 100644 --- a/drivers/hwtracing/coresight/coresight-self-hosted-trace.h +++ b/drivers/hwtracing/coresight/coresight-self-hosted-trace.h @@ -22,11 +22,13 @@ static inline void write_trfcr(u64 val) isb(); } -static inline void cpu_prohibit_trace(void) +static inline u64 cpu_prohibit_trace(void) { u64 trfcr = read_trfcr(); /* Prohibit tracing at EL0 & the kernel EL */ write_trfcr(trfcr & ~(TRFCR_ELx_ExTRE | TRFCR_ELx_E0TRE)); + /* Return the original value of the TRFCR */ + return trfcr; } #endif /* __CORESIGHT_SELF_HOSTED_TRACE_H */ diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index e7567727e8fc..b8586c170889 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -16,6 +16,7 @@ #define pr_fmt(fmt) DRVNAME ": " fmt #include <asm/barrier.h> +#include "coresight-self-hosted-trace.h" #include "coresight-trbe.h" #define PERF_IDX2OFF(idx, buf) ((idx) % ((buf)->nr_pages << PAGE_SHIFT)) @@ -764,6 +765,7 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) enum trbe_fault_action act; u64 status; bool truncated = false; + u64 trfcr; /* Reads to TRBSR_EL1 is fine when TRBE is active */ status = read_sysreg_s(SYS_TRBSR_EL1); @@ -774,6 +776,8 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) if (!is_trbe_irq(status)) return IRQ_NONE; + /* Prohibit the CPU from tracing before we disable the TRBE */ + trfcr = cpu_prohibit_trace(); /* * Ensure the trace is visible to the CPUs and * any external aborts have been resolved. @@ -805,9 +809,14 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) /* * If the buffer was truncated, ensure perf callbacks * have completed, which will disable the event. + * + * Otherwise, restore the trace filter controls to + * allow the tracing. */ if (truncated) irq_work_run(); + else + write_trfcr(trfcr); return IRQ_HANDLED; } -- 2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com> To: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, tamas.zsoldos@arm.com, al.grant@arm.com, leo.yan@linaro.org, mike.leach@linaro.org, mathieu.poirier@linaro.org, suzuki.poulose@arm.com, anshuman.khandual@arm.com, jinlmao@qti.qualcomm.com Subject: [PATCH v2 10/10] coresight: trbe: Prohibit trace before disabling TRBE Date: Fri, 23 Jul 2021 13:46:11 +0100 [thread overview] Message-ID: <20210723124611.3828908-11-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210723124611.3828908-1-suzuki.poulose@arm.com> We must prohibit the CPU from tracing before we disable the TRBE and only re-enable it when we are sure the TRBE has been enabled back. Otherwise, leave the CPU in prohibited state. Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- .../hwtracing/coresight/coresight-self-hosted-trace.h | 4 +++- drivers/hwtracing/coresight/coresight-trbe.c | 9 +++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-self-hosted-trace.h b/drivers/hwtracing/coresight/coresight-self-hosted-trace.h index 586d26e0cba3..34372482a3cd 100644 --- a/drivers/hwtracing/coresight/coresight-self-hosted-trace.h +++ b/drivers/hwtracing/coresight/coresight-self-hosted-trace.h @@ -22,11 +22,13 @@ static inline void write_trfcr(u64 val) isb(); } -static inline void cpu_prohibit_trace(void) +static inline u64 cpu_prohibit_trace(void) { u64 trfcr = read_trfcr(); /* Prohibit tracing at EL0 & the kernel EL */ write_trfcr(trfcr & ~(TRFCR_ELx_ExTRE | TRFCR_ELx_E0TRE)); + /* Return the original value of the TRFCR */ + return trfcr; } #endif /* __CORESIGHT_SELF_HOSTED_TRACE_H */ diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index e7567727e8fc..b8586c170889 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -16,6 +16,7 @@ #define pr_fmt(fmt) DRVNAME ": " fmt #include <asm/barrier.h> +#include "coresight-self-hosted-trace.h" #include "coresight-trbe.h" #define PERF_IDX2OFF(idx, buf) ((idx) % ((buf)->nr_pages << PAGE_SHIFT)) @@ -764,6 +765,7 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) enum trbe_fault_action act; u64 status; bool truncated = false; + u64 trfcr; /* Reads to TRBSR_EL1 is fine when TRBE is active */ status = read_sysreg_s(SYS_TRBSR_EL1); @@ -774,6 +776,8 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) if (!is_trbe_irq(status)) return IRQ_NONE; + /* Prohibit the CPU from tracing before we disable the TRBE */ + trfcr = cpu_prohibit_trace(); /* * Ensure the trace is visible to the CPUs and * any external aborts have been resolved. @@ -805,9 +809,14 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev) /* * If the buffer was truncated, ensure perf callbacks * have completed, which will disable the event. + * + * Otherwise, restore the trace filter controls to + * allow the tracing. */ if (truncated) irq_work_run(); + else + write_trfcr(trfcr); return IRQ_HANDLED; } -- 2.24.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-23 12:46 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-23 12:46 [PATCH v2 00/10] coresight: TRBE and Self-Hosted trace fixes Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-23 12:46 ` [PATCH v2 01/10] coresight: etm4x: Save restore TRFCR_EL1 Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 3:05 ` Anshuman Khandual 2021-07-30 3:05 ` Anshuman Khandual 2021-07-23 12:46 ` [PATCH v2 02/10] coresight: etm4x: Use Trace Filtering controls dynamically Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 3:48 ` Anshuman Khandual 2021-07-30 3:48 ` Anshuman Khandual 2021-07-30 11:29 ` Suzuki K Poulose 2021-07-30 11:29 ` Suzuki K Poulose 2021-07-23 12:46 ` [PATCH v2 03/10] coresight: etm-pmu: Ensure the AUX handle is valid Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 4:14 ` Anshuman Khandual 2021-07-30 4:14 ` Anshuman Khandual 2021-07-23 12:46 ` [PATCH v2 04/10] coresight: trbe: Ensure the format flag is set on truncation Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 4:26 ` Anshuman Khandual 2021-07-30 4:26 ` Anshuman Khandual 2021-07-30 11:37 ` Suzuki K Poulose 2021-07-30 11:37 ` Suzuki K Poulose 2021-07-23 12:46 ` [PATCH v2 05/10] coresight: trbe: Drop duplicate TRUNCATE flags Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 4:47 ` Anshuman Khandual 2021-07-30 4:47 ` Anshuman Khandual 2021-07-30 12:58 ` Suzuki K Poulose 2021-07-30 12:58 ` Suzuki K Poulose 2021-07-23 12:46 ` [PATCH v2 06/10] coresight: trbe: Fix handling of spurious interrupts Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 5:15 ` Anshuman Khandual 2021-07-30 5:15 ` Anshuman Khandual 2021-07-30 12:57 ` Suzuki K Poulose 2021-07-30 12:57 ` Suzuki K Poulose 2021-07-23 12:46 ` [PATCH v2 07/10] coresight: trbe: Do not truncate buffer on IRQ Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-26 12:34 ` Mike Leach 2021-07-26 12:34 ` Mike Leach 2021-07-26 16:01 ` Suzuki K Poulose 2021-07-26 16:01 ` Suzuki K Poulose 2021-07-27 10:46 ` Mike Leach 2021-07-27 10:46 ` Mike Leach 2021-07-27 13:06 ` Suzuki K Poulose 2021-07-27 13:06 ` Suzuki K Poulose 2021-07-28 9:25 ` Suzuki K Poulose 2021-07-28 9:25 ` Suzuki K Poulose 2021-07-23 12:46 ` [PATCH v2 08/10] coresight: trbe: Unify the enabling sequence Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 5:40 ` Anshuman Khandual 2021-07-30 5:40 ` Anshuman Khandual 2021-07-23 12:46 ` [PATCH v2 09/10] coresight: trbe: End the AUX handle on truncation Suzuki K Poulose 2021-07-23 12:46 ` Suzuki K Poulose 2021-07-30 5:54 ` Anshuman Khandual 2021-07-30 5:54 ` Anshuman Khandual 2021-07-23 12:46 ` Suzuki K Poulose [this message] 2021-07-23 12:46 ` [PATCH v2 10/10] coresight: trbe: Prohibit trace before disabling TRBE Suzuki K Poulose 2021-07-30 6:58 ` Anshuman Khandual 2021-07-30 6:58 ` Anshuman Khandual 2021-07-23 13:45 ` [PATCH v2 00/10] coresight: TRBE and Self-Hosted trace fixes Suzuki K Poulose 2021-07-23 13:45 ` Suzuki K Poulose
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