From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: "Intel Graphics Development" <intel-gfx@lists.freedesktop.org>, "Daniel Vetter" <daniel.vetter@ffwll.ch>, "Lucas Stach" <l.stach@pengutronix.de>, "Daniel Vetter" <daniel.vetter@intel.com>, "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>, "Thomas Hellström" <thomas.hellstrom@linux.intel.com>, "Jason Ekstrand" <jason@jlekstrand.net> Subject: [PATCH v5 19/20] drm/i915: Don't break exclusive fence ordering Date: Thu, 5 Aug 2021 12:47:04 +0200 [thread overview] Message-ID: <20210805104705.862416-20-daniel.vetter@ffwll.ch> (raw) In-Reply-To: <20210805104705.862416-1-daniel.vetter@ffwll.ch> There's only one exclusive slot, and we must not break the ordering. Adding a new exclusive fence drops all previous fences from the dma_resv. To avoid violating the signalling order we err on the side of over-synchronizing by waiting for the existing fences, even if userspace asked us to ignore them. A better fix would be to us a dma_fence_chain or _array like e.g. amdgpu now uses, but it probably makes sense to lift this into dma-resv.c code as a proper concept, so that drivers don't have to hack up their own solution each on their own. Hence go with the simple fix for now. Another option is the fence import ioctl from Jason: https://lore.kernel.org/dri-devel/20210610210925.642582-7-jason@jlekstrand.net/ v2: Improve commit message per Lucas' suggestion. Cc: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 1ed7475de454..25ba2765d27d 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -2240,6 +2240,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb) struct i915_vma *vma = ev->vma; unsigned int flags = ev->flags; struct drm_i915_gem_object *obj = vma->obj; + bool async, write; assert_vma_held(vma); @@ -2271,7 +2272,10 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb) flags &= ~EXEC_OBJECT_ASYNC; } - if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { + async = flags & EXEC_OBJECT_ASYNC; + write = flags & EXEC_OBJECT_WRITE; + + if (err == 0 && (!async || write)) { err = i915_request_await_object (eb->request, obj, flags & EXEC_OBJECT_WRITE); } -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel.vetter@ffwll.ch> To: DRI Development <dri-devel@lists.freedesktop.org> Cc: "Intel Graphics Development" <intel-gfx@lists.freedesktop.org>, "Daniel Vetter" <daniel.vetter@ffwll.ch>, "Lucas Stach" <l.stach@pengutronix.de>, "Daniel Vetter" <daniel.vetter@intel.com>, "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>, "Thomas Hellström" <thomas.hellstrom@linux.intel.com>, "Jason Ekstrand" <jason@jlekstrand.net> Subject: [Intel-gfx] [PATCH v5 19/20] drm/i915: Don't break exclusive fence ordering Date: Thu, 5 Aug 2021 12:47:04 +0200 [thread overview] Message-ID: <20210805104705.862416-20-daniel.vetter@ffwll.ch> (raw) In-Reply-To: <20210805104705.862416-1-daniel.vetter@ffwll.ch> There's only one exclusive slot, and we must not break the ordering. Adding a new exclusive fence drops all previous fences from the dma_resv. To avoid violating the signalling order we err on the side of over-synchronizing by waiting for the existing fences, even if userspace asked us to ignore them. A better fix would be to us a dma_fence_chain or _array like e.g. amdgpu now uses, but it probably makes sense to lift this into dma-resv.c code as a proper concept, so that drivers don't have to hack up their own solution each on their own. Hence go with the simple fix for now. Another option is the fence import ioctl from Jason: https://lore.kernel.org/dri-devel/20210610210925.642582-7-jason@jlekstrand.net/ v2: Improve commit message per Lucas' suggestion. Cc: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 1ed7475de454..25ba2765d27d 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -2240,6 +2240,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb) struct i915_vma *vma = ev->vma; unsigned int flags = ev->flags; struct drm_i915_gem_object *obj = vma->obj; + bool async, write; assert_vma_held(vma); @@ -2271,7 +2272,10 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb) flags &= ~EXEC_OBJECT_ASYNC; } - if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { + async = flags & EXEC_OBJECT_ASYNC; + write = flags & EXEC_OBJECT_WRITE; + + if (err == 0 && (!async || write)) { err = i915_request_await_object (eb->request, obj, flags & EXEC_OBJECT_WRITE); } -- 2.32.0
next prev parent reply other threads:[~2021-08-05 10:48 UTC|newest] Thread overview: 122+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-05 10:46 [PATCH v5 00/20] drm/sched dependency handling and implicit sync fixes Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 01/20] drm/sched: Split drm_sched_job_init Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:43 ` Christian König 2021-08-05 13:43 ` [Intel-gfx] " Christian König 2021-08-05 14:07 ` Daniel Vetter 2021-08-05 14:07 ` [Intel-gfx] " Daniel Vetter 2021-08-05 14:47 ` Christian König 2021-08-05 14:47 ` [Intel-gfx] " Christian König 2021-08-05 15:07 ` Daniel Vetter 2021-08-05 15:07 ` [Intel-gfx] " Daniel Vetter 2021-08-17 8:49 ` [PATCH] " Daniel Vetter 2021-08-17 8:49 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 02/20] drm/msm: Fix drm/sched point of no return rules Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 23:02 ` Rob Clark 2021-08-05 23:02 ` [Intel-gfx] " Rob Clark 2021-08-06 16:41 ` Daniel Vetter 2021-08-06 16:41 ` [Intel-gfx] " Daniel Vetter 2021-08-06 17:19 ` Rob Clark 2021-08-06 17:19 ` [Intel-gfx] " Rob Clark 2021-08-06 18:41 ` Daniel Vetter 2021-08-06 18:41 ` [Intel-gfx] " Daniel Vetter 2021-08-06 19:01 ` Rob Clark 2021-08-06 19:01 ` [Intel-gfx] " Rob Clark 2021-08-06 19:10 ` Daniel Vetter 2021-08-06 19:10 ` [Intel-gfx] " Daniel Vetter 2021-08-06 19:59 ` Rob Clark 2021-08-06 19:59 ` [Intel-gfx] " Rob Clark 2021-08-17 8:53 ` [PATCH] drm/msm: Improve " Daniel Vetter 2021-08-17 8:53 ` [Intel-gfx] " Daniel Vetter 2021-08-26 9:33 ` Daniel Vetter 2021-08-26 9:33 ` [Intel-gfx] " Daniel Vetter 2021-08-26 15:38 ` Rob Clark 2021-08-26 15:38 ` Rob Clark 2021-08-05 10:46 ` [PATCH v5 03/20] drm/sched: Barriers are needed for entity->last_scheduled Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:45 ` Christian König 2021-08-05 13:45 ` [Intel-gfx] " Christian König 2021-08-05 10:46 ` [PATCH v5 04/20] drm/sched: Add dependency tracking Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:47 ` Christian König 2021-08-05 13:47 ` [Intel-gfx] " Christian König 2021-08-05 10:46 ` [PATCH v5 05/20] drm/sched: drop entity parameter from drm_sched_push_job Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:48 ` Christian König 2021-08-05 13:48 ` [Intel-gfx] " Christian König 2021-08-05 10:46 ` [PATCH v5 06/20] drm/sched: improve docs around drm_sched_entity Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 07/20] drm/panfrost: use scheduler dependency tracking Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 15:10 ` Alyssa Rosenzweig 2021-08-05 15:10 ` [Intel-gfx] " Alyssa Rosenzweig 2021-08-05 10:46 ` [PATCH v5 08/20] drm/lima: " Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-12 19:28 ` Daniel Vetter 2021-08-12 19:28 ` [Intel-gfx] " Daniel Vetter 2021-08-14 2:45 ` Qiang Yu 2021-08-14 2:45 ` [Intel-gfx] " Qiang Yu 2021-08-05 10:46 ` [PATCH v5 09/20] drm/v3d: Move drm_sched_job_init to v3d_job_init Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 10/20] drm/v3d: Use scheduler dependency handling Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 11/20] drm/etnaviv: " Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-12 19:28 ` Daniel Vetter 2021-08-12 19:28 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 12/20] drm/msm: " Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-12 19:29 ` Daniel Vetter 2021-08-12 19:29 ` [Intel-gfx] " Daniel Vetter 2021-08-26 16:12 ` Rob Clark 2021-08-26 16:12 ` [Intel-gfx] " Rob Clark 2021-08-30 9:01 ` Daniel Vetter 2021-08-30 9:01 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 13/20] drm/gem: Delete gem array fencing helpers Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-12 19:29 ` Daniel Vetter 2021-08-12 19:29 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:46 ` [PATCH v5 14/20] drm/sched: Don't store self-dependencies Daniel Vetter 2021-08-05 10:46 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:18 ` Christian König 2021-08-05 13:18 ` [Intel-gfx] " Christian König 2021-08-05 13:25 ` Daniel Vetter 2021-08-05 13:25 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:57 ` Christian König 2021-08-05 13:57 ` [Intel-gfx] " Christian König 2021-08-05 15:06 ` Daniel Vetter 2021-08-05 15:06 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:47 ` [PATCH v5 15/20] drm/sched: Check locking in drm_sched_job_await_implicit Daniel Vetter 2021-08-05 10:47 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:19 ` Christian König 2021-08-05 13:19 ` [Intel-gfx] " Christian König 2021-08-05 13:27 ` Daniel Vetter 2021-08-05 13:27 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:47 ` [PATCH v5 16/20] drm/msm: Don't break exclusive fence ordering Daniel Vetter 2021-08-05 10:47 ` [Intel-gfx] " Daniel Vetter 2021-08-26 16:16 ` Rob Clark 2021-08-26 16:16 ` [Intel-gfx] " Rob Clark 2021-08-26 16:16 ` Rob Clark 2021-08-30 9:02 ` Daniel Vetter 2021-08-30 9:02 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:47 ` [PATCH v5 17/20] drm/etnaviv: " Daniel Vetter 2021-08-05 10:47 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:47 ` [PATCH v5 18/20] drm/i915: delete exclude argument from i915_sw_fence_await_reservation Daniel Vetter 2021-08-05 10:47 ` [Intel-gfx] " Daniel Vetter 2021-08-05 10:47 ` Daniel Vetter [this message] 2021-08-05 10:47 ` [Intel-gfx] [PATCH v5 19/20] drm/i915: Don't break exclusive fence ordering Daniel Vetter 2021-08-05 10:47 ` [PATCH v5 20/20] dma-resv: Give the docs a do-over Daniel Vetter 2021-08-05 10:47 ` [Intel-gfx] " Daniel Vetter 2021-08-30 19:38 ` Daniel Vetter 2021-08-30 19:38 ` [Intel-gfx] " Daniel Vetter 2021-08-05 13:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/sched dependency handling and implicit sync fixes Patchwork 2021-08-05 14:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-08-06 19:14 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/sched dependency handling and implicit sync fixes (rev2) Patchwork 2021-08-17 16:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/sched dependency handling and implicit sync fixes (rev4) Patchwork 2021-08-17 16:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-17 18:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-08-26 13:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/sched dependency handling and implicit sync fixes (rev5) Patchwork 2021-08-26 13:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-26 21:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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