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From: George Cherian <george.cherian@marvell.com>
To: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>
Cc: <bhelgaas@google.com>, George Cherian <george.cherian@marvell.com>
Subject: [PATCH] PCI: Add ACS quirk for Cavium multi-function devices
Date: Tue, 10 Aug 2021 17:54:25 +0530	[thread overview]
Message-ID: <20210810122425.1115156-1-george.cherian@marvell.com> (raw)

Some Cavium endpoints are implemented as multi-function devices
without ACS capability, but they actually don't support peer-to-peer
transactions.

Add ACS quirks to declare DMA isolation.

Apply te quirk for following devices
1. BGX device found on Octeon-TX (8xxx)
2. CGX device found on Octeon-TX2 (9xxx)
3. RPM device found on Octeon-TX3 (10xxx)

Signed-off-by: George Cherian <george.cherian@marvell.com>
---
 drivers/pci/quirks.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6d74386eadc2..076932018494 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4840,6 +4840,10 @@ static const struct pci_dev_acs_enabled {
 	{ 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */
 	/* Cavium ThunderX */
 	{ PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
+	/* Cavium multi-function devices */
+	{ PCI_VENDOR_ID_CAVIUM, 0xA026, pci_quirk_mf_endpoint_acs },
+	{ PCI_VENDOR_ID_CAVIUM, 0xA059, pci_quirk_mf_endpoint_acs },
+	{ PCI_VENDOR_ID_CAVIUM, 0xA060, pci_quirk_mf_endpoint_acs },
 	/* APM X-Gene */
 	{ PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
 	/* Ampere Computing */
-- 
2.25.1


             reply	other threads:[~2021-08-10 12:24 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-10 12:24 George Cherian [this message]
2021-08-10 14:47 ` [PATCH] PCI: Add ACS quirk for Cavium multi-function devices Bjorn Helgaas
2021-08-20 21:14 ` Bjorn Helgaas
2021-08-11  4:10 George Cherian

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