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From: Cezary Rojewski <cezary.rojewski@intel.com>
To: alsa-devel@alsa-project.org
Cc: Cezary Rojewski <cezary.rojewski@intel.com>,
	jairaj.arava@intel.com, upstream@semihalf.com,
	harshapriya.n@intel.com, cujomalainey@google.com, tiwai@suse.com,
	pierre-louis.bossart@linux.intel.com, hdegoede@redhat.com,
	broonie@kernel.org, jenny.tc@intel.com, lma@semihalf.com,
	vamshi.krishna.gopal@intel.com
Subject: [PATCH 02/11] ASoC: Intel: Skylake: Leave data as is when invoking TLV IPCs
Date: Wed, 18 Aug 2021 09:57:33 +0200	[thread overview]
Message-ID: <20210818075742.1515155-3-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20210818075742.1515155-1-cezary.rojewski@intel.com>

Advancing pointer initially fixed issue for some users but caused
regression for others. Leave data as it to make it easier for end users
to adjust their topology files if needed.

Fixes: a8cd7066f042 ("ASoC: Intel: Skylake: Strip T and L from TLV IPCs")
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
 sound/soc/intel/skylake/skl-topology.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c
index c0fdab39e7c2..45b1521e6189 100644
--- a/sound/soc/intel/skylake/skl-topology.c
+++ b/sound/soc/intel/skylake/skl-topology.c
@@ -1463,12 +1463,6 @@ static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
 	struct skl_dev *skl = get_skl_ctx(w->dapm->dev);
 
 	if (ac->params) {
-		/*
-		 * Widget data is expected to be stripped of T and L
-		 */
-		size -= 2 * sizeof(unsigned int);
-		data += 2;
-
 		if (size > ac->max)
 			return -EINVAL;
 		ac->size = size;
-- 
2.25.1


  parent reply	other threads:[~2021-08-18  7:56 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-18  7:57 [PATCH 00/11] ASoC: Intel: Skylake: Fix and support complex Cezary Rojewski
2021-08-18  7:57 ` [PATCH 01/11] ASoC: Intel: kbl_da7219_max98927: Fix format selection for max98373 Cezary Rojewski
2021-08-18  7:57 ` Cezary Rojewski [this message]
2021-08-18  7:57 ` [PATCH 03/11] ASoC: Intel: Skylake: Select proper format for NHLT blob Cezary Rojewski
2021-08-18  7:57 ` [PATCH 04/11] ASoC: Intel: Skylake: Fix module resource and format selection Cezary Rojewski
2021-08-18  7:57 ` [PATCH 05/11] ASoC: Intel: Skylake: Fix module configuration for KPB and MIXER Cezary Rojewski
2021-08-18  7:57 ` [PATCH 06/11] ASoC: Intel: Skylake: Fix passing loadable flag for module Cezary Rojewski
2021-08-18  7:57 ` [PATCH 07/11] ASoC: Intel: Skylake: Simplify m_state for loadable modules Cezary Rojewski
2021-08-18  7:57 ` [PATCH 08/11] ASoC: Intel: Skylake: Support multiple format configs Cezary Rojewski
2021-08-18  7:57 ` [PATCH 09/11] ASoC: Intel: Skylake: Support modules with generic extension Cezary Rojewski
2021-08-18  7:57 ` [PATCH 10/11] ASoC: Intel: Skylake: Properly configure " Cezary Rojewski
2021-08-18  7:57 ` [PATCH 11/11] ASoC: Intel: Skylake: Select first entry for singular pipe config arrays Cezary Rojewski
2021-08-18 11:08 ` [PATCH 00/11] ASoC: Intel: Skylake: Fix and support complex Lukasz Majczak
2021-08-23 17:37 ` Mark Brown

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