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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Sanjay Kumar <sanjay.k.kumar@intel.com>,
	iommu@lists.linux-foundation.org,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH 9/9] iommu/vt-d: Add present bit check in pasid entry setup helpers
Date: Wed, 18 Aug 2021 21:48:52 +0800	[thread overview]
Message-ID: <20210818134852.1847070-10-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20210818134852.1847070-1-baolu.lu@linux.intel.com>

From: Liu Yi L <yi.l.liu@intel.com>

The helper functions should not modify the pasid entries which are still
in use. Add a check against present bit.

Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
Link: https://lore.kernel.org/r/20210817042425.1784279-1-yi.l.liu@intel.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 drivers/iommu/intel/pasid.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index eda599e70a68..07c390aed1fe 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -540,6 +540,10 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
 		devtlb_invalidation_with_pasid(iommu, dev, pasid);
 }
 
+/*
+ * This function flushes cache for a newly setup pasid table entry.
+ * Caller of it should not modify the in-use pasid table entries.
+ */
 static void pasid_flush_caches(struct intel_iommu *iommu,
 				struct pasid_entry *pte,
 			       u32 pasid, u16 did)
@@ -591,6 +595,10 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu,
 	if (WARN_ON(!pte))
 		return -EINVAL;
 
+	/* Caller must ensure PASID entry is not in use. */
+	if (pasid_pte_is_present(pte))
+		return -EBUSY;
+
 	pasid_clear_entry(pte);
 
 	/* Setup the first level page table pointer: */
@@ -690,6 +698,10 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu,
 		return -ENODEV;
 	}
 
+	/* Caller must ensure PASID entry is not in use. */
+	if (pasid_pte_is_present(pte))
+		return -EBUSY;
+
 	pasid_clear_entry(pte);
 	pasid_set_domain_id(pte, did);
 	pasid_set_slptr(pte, pgd_val);
@@ -729,6 +741,10 @@ int intel_pasid_setup_pass_through(struct intel_iommu *iommu,
 		return -ENODEV;
 	}
 
+	/* Caller must ensure PASID entry is not in use. */
+	if (pasid_pte_is_present(pte))
+		return -EBUSY;
+
 	pasid_clear_entry(pte);
 	pasid_set_domain_id(pte, did);
 	pasid_set_address_width(pte, iommu->agaw);
-- 
2.25.1

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  parent reply	other threads:[~2021-08-18 13:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-18 13:48 [PATCH 0/9] [PULL REQUEST] Intel IOMMU Updates for Linux v5.15 Lu Baolu
2021-08-18 13:48 ` [PATCH 1/9] iommu/vt-d: Update the virtual command related registers Lu Baolu
2021-08-18 13:48 ` [PATCH 2/9] iommu/vt-d: Remove unnecessary oom message Lu Baolu
2021-08-18 13:48 ` [PATCH 3/9] iommu/vt-d: Refactor Kconfig a bit Lu Baolu
2021-08-18 13:48 ` [PATCH 4/9] iommu/vt-d: Enable Intel IOMMU scalable mode by default Lu Baolu
2021-08-18 13:48 ` [PATCH 5/9] iommu/vt-d: Preset A/D bits for user space DMA usage Lu Baolu
2021-08-18 13:48 ` [PATCH 6/9] iommu/vt-d: Allow devices to have more than 32 outstanding PRs Lu Baolu
2021-08-18 13:48 ` [PATCH 7/9] iommu/vt-d: Drop the kernel doc annotation Lu Baolu
2021-08-18 13:48 ` [PATCH 8/9] iommu/vt-d: Use pasid_pte_is_present() helper function Lu Baolu
2021-08-18 13:48 ` Lu Baolu [this message]
2021-08-19  8:46 ` [PATCH 0/9] [PULL REQUEST] Intel IOMMU Updates for Linux v5.15 Joerg Roedel

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