From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: <daniel.vetter@ffwll.ch> Subject: [PATCH 06/27] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Date: Wed, 18 Aug 2021 23:16:18 -0700 [thread overview] Message-ID: <20210819061639.21051-7-matthew.brost@intel.com> (raw) In-Reply-To: <20210819061639.21051-1-matthew.brost@intel.com> If the context is reset as a result of the request cancelation the context reset G2H is received after schedule disable done G2H which is likely the wrong order. The schedule disable done G2H release the waiting request cancelation code which resubmits the context. This races with the context reset G2H which also wants to resubmit the context but in this case it really should be a NOP as request cancelation code owns the resubmit. Use some clever tricks of checking the context state to seal this race until if / when the GuC firmware is fixed. v2: (Checkpatch) - Fix typos Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Cc: <stable@vger.kernel.org> --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 43 ++++++++++++++++--- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index e4a099f8f820..8f7a11e65ef5 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -832,17 +832,35 @@ __unwind_incomplete_requests(struct intel_context *ce) static void __guc_reset_context(struct intel_context *ce, bool stalled) { struct i915_request *rq; + unsigned long flags; u32 head; + bool skip = false; intel_context_get(ce); /* - * GuC will implicitly mark the context as non-schedulable - * when it sends the reset notification. Make sure our state - * reflects this change. The context will be marked enabled - * on resubmission. + * GuC will implicitly mark the context as non-schedulable when it sends + * the reset notification. Make sure our state reflects this change. The + * context will be marked enabled on resubmission. + * + * XXX: If the context is reset as a result of the request cancellation + * this G2H is received after the schedule disable complete G2H which is + * likely wrong as this creates a race between the request cancellation + * code re-submitting the context and this G2H handler. This likely + * should be fixed in the GuC but until if / when that gets fixed we + * need to workaround this. Convert this function to a NOP if a pending + * enable is in flight as this indicates that a request cancellation has + * occurred. */ - clr_context_enabled(ce); + spin_lock_irqsave(&ce->guc_state.lock, flags); + if (likely(!context_pending_enable(ce))) { + clr_context_enabled(ce); + } else { + skip = true; + } + spin_unlock_irqrestore(&ce->guc_state.lock, flags); + if (unlikely(skip)) + goto out_put; rq = intel_context_find_active_request(ce); if (!rq) { @@ -861,6 +879,7 @@ static void __guc_reset_context(struct intel_context *ce, bool stalled) out_replay: guc_reset_state(ce, head, stalled); __unwind_incomplete_requests(ce); +out_put: intel_context_put(ce); } @@ -1605,6 +1624,13 @@ static void guc_context_cancel_request(struct intel_context *ce, guc_reset_state(ce, intel_ring_wrap(ce->ring, rq->head), true); } + + /* + * XXX: Racey if context is reset, see comment in + * __guc_reset_context(). + */ + flush_work(&ce_to_guc(ce)->ct.requests.worker); + guc_context_unblock(ce); } } @@ -2719,7 +2745,12 @@ static void guc_handle_context_reset(struct intel_guc *guc, { trace_intel_context_reset(ce); - if (likely(!intel_context_is_banned(ce))) { + /* + * XXX: Racey if request cancellation has occurred, see comment in + * __guc_reset_context(). + */ + if (likely(!intel_context_is_banned(ce) && + !context_blocked(ce))) { capture_error_state(guc, ce); guc_context_replay(ce); } -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: <daniel.vetter@ffwll.ch> Subject: [Intel-gfx] [PATCH 06/27] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Date: Wed, 18 Aug 2021 23:16:18 -0700 [thread overview] Message-ID: <20210819061639.21051-7-matthew.brost@intel.com> (raw) In-Reply-To: <20210819061639.21051-1-matthew.brost@intel.com> If the context is reset as a result of the request cancelation the context reset G2H is received after schedule disable done G2H which is likely the wrong order. The schedule disable done G2H release the waiting request cancelation code which resubmits the context. This races with the context reset G2H which also wants to resubmit the context but in this case it really should be a NOP as request cancelation code owns the resubmit. Use some clever tricks of checking the context state to seal this race until if / when the GuC firmware is fixed. v2: (Checkpatch) - Fix typos Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost <matthew.brost@intel.com> Cc: <stable@vger.kernel.org> --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 43 ++++++++++++++++--- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index e4a099f8f820..8f7a11e65ef5 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -832,17 +832,35 @@ __unwind_incomplete_requests(struct intel_context *ce) static void __guc_reset_context(struct intel_context *ce, bool stalled) { struct i915_request *rq; + unsigned long flags; u32 head; + bool skip = false; intel_context_get(ce); /* - * GuC will implicitly mark the context as non-schedulable - * when it sends the reset notification. Make sure our state - * reflects this change. The context will be marked enabled - * on resubmission. + * GuC will implicitly mark the context as non-schedulable when it sends + * the reset notification. Make sure our state reflects this change. The + * context will be marked enabled on resubmission. + * + * XXX: If the context is reset as a result of the request cancellation + * this G2H is received after the schedule disable complete G2H which is + * likely wrong as this creates a race between the request cancellation + * code re-submitting the context and this G2H handler. This likely + * should be fixed in the GuC but until if / when that gets fixed we + * need to workaround this. Convert this function to a NOP if a pending + * enable is in flight as this indicates that a request cancellation has + * occurred. */ - clr_context_enabled(ce); + spin_lock_irqsave(&ce->guc_state.lock, flags); + if (likely(!context_pending_enable(ce))) { + clr_context_enabled(ce); + } else { + skip = true; + } + spin_unlock_irqrestore(&ce->guc_state.lock, flags); + if (unlikely(skip)) + goto out_put; rq = intel_context_find_active_request(ce); if (!rq) { @@ -861,6 +879,7 @@ static void __guc_reset_context(struct intel_context *ce, bool stalled) out_replay: guc_reset_state(ce, head, stalled); __unwind_incomplete_requests(ce); +out_put: intel_context_put(ce); } @@ -1605,6 +1624,13 @@ static void guc_context_cancel_request(struct intel_context *ce, guc_reset_state(ce, intel_ring_wrap(ce->ring, rq->head), true); } + + /* + * XXX: Racey if context is reset, see comment in + * __guc_reset_context(). + */ + flush_work(&ce_to_guc(ce)->ct.requests.worker); + guc_context_unblock(ce); } } @@ -2719,7 +2745,12 @@ static void guc_handle_context_reset(struct intel_guc *guc, { trace_intel_context_reset(ce); - if (likely(!intel_context_is_banned(ce))) { + /* + * XXX: Racey if request cancellation has occurred, see comment in + * __guc_reset_context(). + */ + if (likely(!intel_context_is_banned(ce) && + !context_blocked(ce))) { capture_error_state(guc, ce); guc_context_replay(ce); } -- 2.32.0
next prev parent reply other threads:[~2021-08-19 6:22 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-19 6:16 [PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-19 6:16 ` [PATCH 01/27] drm/i915/guc: Fix blocked context accounting Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-24 23:24 ` Daniele Ceraolo Spurio 2021-08-24 23:24 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 02/27] drm/i915/guc: Fix outstanding G2H accounting Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-19 21:31 ` Daniele Ceraolo Spurio 2021-08-19 21:30 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 03/27] drm/i915/guc: Unwind context requests in reverse order Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-19 23:54 ` Daniele Ceraolo Spurio 2021-08-19 23:53 ` Matthew Brost 2021-08-20 0:03 ` Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 04/27] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-20 0:01 ` Daniele Ceraolo Spurio 2021-08-19 23:58 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 05/27] drm/i915/guc: Process all G2H message at once in work queue Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-20 0:06 ` Daniele Ceraolo Spurio 2021-08-20 0:06 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` Matthew Brost [this message] 2021-08-19 6:16 ` [Intel-gfx] [PATCH 06/27] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Matthew Brost 2021-08-24 23:31 ` Daniele Ceraolo Spurio 2021-08-25 4:05 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 07/27] Revert "drm/i915/gt: Propagate change in error status to children on unhold" Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-20 19:47 ` Jason Ekstrand 2021-08-20 19:47 ` [Intel-gfx] " Jason Ekstrand 2021-08-19 6:16 ` [PATCH 08/27] drm/i915/selftests: Add a cancel request selftest that triggers a reset Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-19 6:16 ` [PATCH 09/27] drm/i915/guc: Kick tasklet after queuing a request Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-20 18:31 ` Daniele Ceraolo Spurio 2021-08-20 18:36 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 10/27] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-20 18:42 ` Daniele Ceraolo Spurio 2021-08-20 18:42 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 11/27] drm/i915/selftests: Fix memory corruption in live_lrc_isolation Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 0:07 ` Daniele Ceraolo Spurio 2021-08-25 20:03 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 12/27] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 0:58 ` Daniele Ceraolo Spurio 2021-08-25 0:58 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 13/27] drm/i915/guc: Take context ref when cancelling request Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-21 0:07 ` Daniele Ceraolo Spurio 2021-08-21 0:07 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-24 15:42 ` Matthew Brost 2021-08-24 15:42 ` [Intel-gfx] " Matthew Brost 2021-08-25 1:21 ` Daniele Ceraolo Spurio 2021-08-25 1:21 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 14/27] drm/i915/guc: Don't touch guc_state.sched_state without a lock Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 1:20 ` Daniele Ceraolo Spurio 2021-08-25 1:44 ` Matthew Brost 2021-08-25 1:51 ` Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 15/27] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-21 0:14 ` Daniele Ceraolo Spurio 2021-08-21 0:14 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 16/27] drm/i915: Allocate error capture in nowait context Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-19 6:16 ` [PATCH 17/27] drm/i915/guc: Flush G2H work queue during reset Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-21 0:25 ` Daniele Ceraolo Spurio 2021-08-21 0:25 ` Daniele Ceraolo Spurio 2021-08-24 15:44 ` Matthew Brost 2021-08-24 15:44 ` [Intel-gfx] " Matthew Brost 2021-08-25 1:22 ` Daniele Ceraolo Spurio 2021-08-25 1:22 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 18/27] drm/i915/guc: Release submit fence from an irq_work Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 1:44 ` Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 19/27] drm/i915/guc: Move guc_blocked fence to struct guc_state Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-21 0:30 ` Daniele Ceraolo Spurio 2021-08-21 0:30 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 20/27] drm/i915/guc: Rework and simplify locking Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 16:52 ` Daniele Ceraolo Spurio 2021-08-25 19:22 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 21/27] drm/i915/guc: Proper xarray usage for contexts_lookup Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-26 0:44 ` Daniele Ceraolo Spurio 2021-08-26 0:41 ` Matthew Brost 2021-08-26 0:48 ` Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 22/27] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-26 0:50 ` Daniele Ceraolo Spurio 2021-08-26 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 23/27] drm/i915/guc: Move GuC priority fields in context under guc_active Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 21:51 ` Daniele Ceraolo Spurio 2021-08-25 22:53 ` Matthew Brost 2021-08-25 23:04 ` Matthew Brost 2021-08-19 6:16 ` [PATCH 24/27] drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-25 2:00 ` Daniele Ceraolo Spurio 2021-08-25 2:00 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 25/27] drm/i915/guc: Drop guc_active move everything into guc_state Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-26 0:54 ` Daniele Ceraolo Spurio 2021-08-26 0:54 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 26/27] drm/i915/guc: Add GuC kernel doc Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-26 1:03 ` Daniele Ceraolo Spurio 2021-08-19 6:16 ` [PATCH 27/27] drm/i915/guc: Drop static inline functions intel_guc_submission.c Matthew Brost 2021-08-19 6:16 ` [Intel-gfx] " Matthew Brost 2021-08-19 7:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev3) Patchwork 2021-08-19 7:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-08-19 7:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-19 9:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-08-26 3:23 [PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost 2021-08-26 3:23 ` [PATCH 06/27] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Matthew Brost 2021-08-26 23:11 ` Daniele Ceraolo Spurio
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