From: Marcel Ziswiler <marcel@ziswiler.com> To: linux-arm-kernel@lists.infradead.org Cc: Max Krummenacher <max.krummenacher@toradex.com>, Marcel Ziswiler <marcel.ziswiler@toradex.com>, Arnd Bergmann <arnd@arndb.de>, Fabio Estevam <festevam@gmail.com>, Frank Rowand <frowand.list@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Olof Johansson <olof@lixom.net>, Pengutronix Kernel Team <kernel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Russell King <linux@armlinux.org.uk>, Sascha Hauer <s.hauer@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v1 7/7] ARM: dts: colibri-imx6ull-emmc: add device trees Date: Thu, 19 Aug 2021 16:03:45 +0200 [thread overview] Message-ID: <20210819140345.357167-8-marcel@ziswiler.com> (raw) In-Reply-To: <20210819140345.357167-1-marcel@ziswiler.com> From: Max Krummenacher <max.krummenacher@toradex.com> Add devices trees for a Colibri iMX6ULL 1GB which has a eMMC instead of the raw NAND used on other SKUs. Related-to: ELB-4056, ELB-4058 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/imx6ull-colibri-emmc-eval-v3.dts | 17 ++ .../dts/imx6ull-colibri-emmc-nonwifi.dtsi | 185 ++++++++++++++++++ arch/arm/boot/dts/imx6ull-colibri.dtsi | 30 ++- 4 files changed, 232 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e0934180724d..f88ddcc40b6ac 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -671,6 +671,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ul-tx6ul-0011.dtb \ imx6ul-tx6ul-mainboard.dtb \ imx6ull-14x14-evk.dtb \ + imx6ull-colibri-emmc-eval-v3.dtb \ imx6ull-colibri-eval-v3.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts new file mode 100644 index 0000000000000..70104a6c5bac9 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Toradex AG + */ + +/dts-v1/; + +#include "imx6ull-colibri-emmc-nonwifi.dtsi" +#include "imx6ull-colibri-eval-v3.dtsi" + +/ { + model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Evaluation Board V3"; + compatible = "toradex,colibri-imx6ull-emmc-eval", + "toradex,colibri-imx6ull-emmc", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi new file mode 100644 index 0000000000000..df055617e51f7 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Toradex AG + */ + +#include "imx6ull-colibri.dtsi" + +/ { + aliases { + mmc0 = &usdhc2; /* eMMC */ + mmc1 = &usdhc1; /* MMC 4bit slot */ + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; +}; + +&gpio1 { + gpio-line-names = "SODIMM_8", + "SODIMM_6", + "SODIMM_129", + "SODIMM_89", + "SODIMM_19", + "SODIMM_21", + "UNUSABLE_SODIMM_180", + "UNUSABLE_SODIMM_184", + "SODIMM_4", + "SODIMM_2", + "SODIMM_106", + "SODIMM_71", + "SODIMM_23", + "SODIMM_31", + "SODIMM_99", + "SODIMM_102", + "SODIMM_33", + "SODIMM_35", + "SODIMM_25", + "SODIMM_27", + "SODIMM_36", + "SODIMM_38", + "SODIMM_32", + "SODIMM_34", + "SODIMM_135", + "SODIMM_77", + "SODIMM_100", + "SODIMM_186", + "SODIMM_196", + "SODIMM_194"; +}; + +&gpio2 { + gpio-line-names = "SODIMM_55", + "SODIMM_63", + "SODIMM_178", + "SODIMM_188", + "SODIMM_73", + "SODIMM_30", + "SODIMM_67", + "SODIMM_104", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_190", + "SODIMM_47", + "SODIMM_192", + "SODIMM_49", + "SODIMM_51", + "SODIMM_53"; +}; + +&gpio3 { + gpio-line-names = "SODIMM_56", + "SODIMM_44", + "SODIMM_68", + "SODIMM_82", + "", + "SODIMM_76", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_57", + "SODIMM_61", + "SODIMM_29", + "SODIMM_37", + "SODIMM_88", + "SODIMM_86", + "SODIMM_92", + "SODIMM_90"; +}; + +&gpio4 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_140", + "SODIMM_59", + "SODIMM_142", + "SODIMM_144", + "SODIMM_133", + "SODIMM_146", + "SODIMM_28", + "SODIMM_75", + "SODIMM_96", + "SODIMM_81", + "SODIMM_94", + "SODIMM_101", + "SODIMM_103", + "SODIMM_79", + "SODIMM_97", + "SODIMM_69", + "SODIMM_98", + "SODIMM_85", + "SODIMM_65"; +}; + +&gpio5 { + gpio-line-names = "SODIMM_43", + "SODIMM_45", + "SODIMM_137", + "SODIMM_95", + "SODIMM_107", + "SODIMM_131", + "SODIMM_93", + "", + "SODIMM_138", + "", + "SODIMM_105", + "SODIMM_127"; +}; + +&gpmi { + status = "disabled"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 + &pinctrl_gpio4 &pinctrl_gpio6 &pinctrl_gpio7 + &pinctrl_gpmi_gpio>; +}; + +&iomuxc_snvs { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2emmc>; + assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; + assigned-clock-rates = <0>, <198000000>; + bus-width = <8>; + keep-power-in-suspend; + no-1-8-v; + non-removable; + vmmc-supply = <®_module_3v3>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 0cdbf7b6e7285..f432fc0a6a530 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0 OR MIT) /* - * Copyright 2018 Toradex AG + * Copyright 2018-2021 Toradex AG */ #include "imx6ull.dtsi" @@ -345,6 +345,19 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */ >; }; + /* + * With an eMMC instead of a raw NAND device the following pins + * are available at SODIMM pins + */ + pinctrl_gpmi_gpio: gpmi-gpio-grp { + fsl,pins = < + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */ + MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */ + MX6UL_PAD_NAND_CLE__GPIO4_IO15 0x10b0 /* SODIMM 146 */ + MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x10b0 /* SODIMM 142 */ + >; + }; + pinctrl_gpmi_nand: gpmi-nand-grp { fsl,pins = < MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 @@ -533,6 +546,21 @@ MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10 >; }; + pinctrl_usdhc2emmc: usdhc2emmcgrp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + pinctrl_wdog: wdog-grp { fsl,pins = < MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marcel Ziswiler <marcel@ziswiler.com> To: linux-arm-kernel@lists.infradead.org Cc: Max Krummenacher <max.krummenacher@toradex.com>, Marcel Ziswiler <marcel.ziswiler@toradex.com>, Arnd Bergmann <arnd@arndb.de>, Fabio Estevam <festevam@gmail.com>, Frank Rowand <frowand.list@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Olof Johansson <olof@lixom.net>, Pengutronix Kernel Team <kernel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Russell King <linux@armlinux.org.uk>, Sascha Hauer <s.hauer@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v1 7/7] ARM: dts: colibri-imx6ull-emmc: add device trees Date: Thu, 19 Aug 2021 16:03:45 +0200 [thread overview] Message-ID: <20210819140345.357167-8-marcel@ziswiler.com> (raw) In-Reply-To: <20210819140345.357167-1-marcel@ziswiler.com> From: Max Krummenacher <max.krummenacher@toradex.com> Add devices trees for a Colibri iMX6ULL 1GB which has a eMMC instead of the raw NAND used on other SKUs. Related-to: ELB-4056, ELB-4058 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/imx6ull-colibri-emmc-eval-v3.dts | 17 ++ .../dts/imx6ull-colibri-emmc-nonwifi.dtsi | 185 ++++++++++++++++++ arch/arm/boot/dts/imx6ull-colibri.dtsi | 30 ++- 4 files changed, 232 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e0934180724d..f88ddcc40b6ac 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -671,6 +671,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ul-tx6ul-0011.dtb \ imx6ul-tx6ul-mainboard.dtb \ imx6ull-14x14-evk.dtb \ + imx6ull-colibri-emmc-eval-v3.dtb \ imx6ull-colibri-eval-v3.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts new file mode 100644 index 0000000000000..70104a6c5bac9 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Toradex AG + */ + +/dts-v1/; + +#include "imx6ull-colibri-emmc-nonwifi.dtsi" +#include "imx6ull-colibri-eval-v3.dtsi" + +/ { + model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Evaluation Board V3"; + compatible = "toradex,colibri-imx6ull-emmc-eval", + "toradex,colibri-imx6ull-emmc", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi new file mode 100644 index 0000000000000..df055617e51f7 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Toradex AG + */ + +#include "imx6ull-colibri.dtsi" + +/ { + aliases { + mmc0 = &usdhc2; /* eMMC */ + mmc1 = &usdhc1; /* MMC 4bit slot */ + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; +}; + +&gpio1 { + gpio-line-names = "SODIMM_8", + "SODIMM_6", + "SODIMM_129", + "SODIMM_89", + "SODIMM_19", + "SODIMM_21", + "UNUSABLE_SODIMM_180", + "UNUSABLE_SODIMM_184", + "SODIMM_4", + "SODIMM_2", + "SODIMM_106", + "SODIMM_71", + "SODIMM_23", + "SODIMM_31", + "SODIMM_99", + "SODIMM_102", + "SODIMM_33", + "SODIMM_35", + "SODIMM_25", + "SODIMM_27", + "SODIMM_36", + "SODIMM_38", + "SODIMM_32", + "SODIMM_34", + "SODIMM_135", + "SODIMM_77", + "SODIMM_100", + "SODIMM_186", + "SODIMM_196", + "SODIMM_194"; +}; + +&gpio2 { + gpio-line-names = "SODIMM_55", + "SODIMM_63", + "SODIMM_178", + "SODIMM_188", + "SODIMM_73", + "SODIMM_30", + "SODIMM_67", + "SODIMM_104", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_190", + "SODIMM_47", + "SODIMM_192", + "SODIMM_49", + "SODIMM_51", + "SODIMM_53"; +}; + +&gpio3 { + gpio-line-names = "SODIMM_56", + "SODIMM_44", + "SODIMM_68", + "SODIMM_82", + "", + "SODIMM_76", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_57", + "SODIMM_61", + "SODIMM_29", + "SODIMM_37", + "SODIMM_88", + "SODIMM_86", + "SODIMM_92", + "SODIMM_90"; +}; + +&gpio4 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_140", + "SODIMM_59", + "SODIMM_142", + "SODIMM_144", + "SODIMM_133", + "SODIMM_146", + "SODIMM_28", + "SODIMM_75", + "SODIMM_96", + "SODIMM_81", + "SODIMM_94", + "SODIMM_101", + "SODIMM_103", + "SODIMM_79", + "SODIMM_97", + "SODIMM_69", + "SODIMM_98", + "SODIMM_85", + "SODIMM_65"; +}; + +&gpio5 { + gpio-line-names = "SODIMM_43", + "SODIMM_45", + "SODIMM_137", + "SODIMM_95", + "SODIMM_107", + "SODIMM_131", + "SODIMM_93", + "", + "SODIMM_138", + "", + "SODIMM_105", + "SODIMM_127"; +}; + +&gpmi { + status = "disabled"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 + &pinctrl_gpio4 &pinctrl_gpio6 &pinctrl_gpio7 + &pinctrl_gpmi_gpio>; +}; + +&iomuxc_snvs { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2emmc>; + assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; + assigned-clock-rates = <0>, <198000000>; + bus-width = <8>; + keep-power-in-suspend; + no-1-8-v; + non-removable; + vmmc-supply = <®_module_3v3>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 0cdbf7b6e7285..f432fc0a6a530 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0 OR MIT) /* - * Copyright 2018 Toradex AG + * Copyright 2018-2021 Toradex AG */ #include "imx6ull.dtsi" @@ -345,6 +345,19 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */ >; }; + /* + * With an eMMC instead of a raw NAND device the following pins + * are available at SODIMM pins + */ + pinctrl_gpmi_gpio: gpmi-gpio-grp { + fsl,pins = < + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */ + MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */ + MX6UL_PAD_NAND_CLE__GPIO4_IO15 0x10b0 /* SODIMM 146 */ + MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x10b0 /* SODIMM 142 */ + >; + }; + pinctrl_gpmi_nand: gpmi-nand-grp { fsl,pins = < MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 @@ -533,6 +546,21 @@ MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10 >; }; + pinctrl_usdhc2emmc: usdhc2emmcgrp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + pinctrl_wdog: wdog-grp { fsl,pins = < MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 -- 2.26.2
next prev parent reply other threads:[~2021-08-19 14:07 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-19 14:03 [PATCH v1 0/7] ARM: prepare and add colibri imx6ull 1gb (emmc) support Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-19 14:03 ` [PATCH v1 1/7] ARM: imx_v6_v7_defconfig: enable mtd physmap Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-19 14:03 ` [PATCH v1 2/7] ARM: imx_v6_v7_defconfig: enable fb Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-26 19:03 ` Fabio Estevam 2021-08-26 19:03 ` Fabio Estevam 2021-08-27 15:33 ` Stefan Wahren 2021-08-27 15:33 ` Stefan Wahren 2021-09-13 21:57 ` Fabio Estevam 2021-09-13 21:57 ` Fabio Estevam 2021-08-19 14:03 ` [PATCH v1 3/7] ARM: imx_v6_v7_defconfig: change snd soc tlv320aic3x to i2c variant Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-19 14:03 ` [PATCH v1 4/7] ARM: imx_v6_v7_defconfig: rebuild default configuration Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-19 14:03 ` [PATCH v1 5/7] ARM: imx_v6_v7_defconfig: build imx sdma driver as module Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-19 14:03 ` [PATCH v1 6/7] ARM: imx_v6_v7_defconfig: enable bpf syscall and cgroup bpf Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler 2021-08-19 14:03 ` Marcel Ziswiler [this message] 2021-08-19 14:03 ` [PATCH v1 7/7] ARM: dts: colibri-imx6ull-emmc: add device trees Marcel Ziswiler 2021-08-19 16:24 ` Marcel Ziswiler 2021-08-19 16:24 ` Marcel Ziswiler
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