From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: <daniele.ceraolospurio@intel.com> Subject: [PATCH 19/27] drm/i915/guc: Move guc_blocked fence to struct guc_state Date: Wed, 25 Aug 2021 20:23:19 -0700 [thread overview] Message-ID: <20210826032327.18078-20-matthew.brost@intel.com> (raw) In-Reply-To: <20210826032327.18078-1-matthew.brost@intel.com> Move guc_blocked fence to struct guc_state as the lock which protects the fence lives there. s/ce->guc_blocked/ce->guc_state.blocked/g v2: (Daniele) - s/blocked_fence/blocked/g Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/intel_context.c | 5 +++-- drivers/gpu/drm/i915/gt/intel_context_types.h | 5 ++--- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +++++++++--------- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c index 745e84c72c90..3048267ddc7e 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.c +++ b/drivers/gpu/drm/i915/gt/intel_context.c @@ -405,8 +405,9 @@ intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) * Initialize fence to be complete as this is expected to be complete * unless there is a pending schedule disable outstanding. */ - i915_sw_fence_init(&ce->guc_blocked, sw_fence_dummy_notify); - i915_sw_fence_commit(&ce->guc_blocked); + i915_sw_fence_init(&ce->guc_state.blocked, + sw_fence_dummy_notify); + i915_sw_fence_commit(&ce->guc_state.blocked); i915_active_init(&ce->active, __intel_context_active, __intel_context_retire, 0); diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h index 3a73f3117873..5aecb9038b5b 100644 --- a/drivers/gpu/drm/i915/gt/intel_context_types.h +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h @@ -167,6 +167,8 @@ struct intel_context { * fence related to GuC submission */ struct list_head fences; + /* GuC context blocked fence */ + struct i915_sw_fence blocked; } guc_state; struct { @@ -190,9 +192,6 @@ struct intel_context { */ struct list_head guc_id_link; - /* GuC context blocked fence */ - struct i915_sw_fence guc_blocked; - /* * GuC priority management */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index c86aae0899e5..9d1eadd4b7c4 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -1488,24 +1488,24 @@ static void guc_blocked_fence_complete(struct intel_context *ce) { lockdep_assert_held(&ce->guc_state.lock); - if (!i915_sw_fence_done(&ce->guc_blocked)) - i915_sw_fence_complete(&ce->guc_blocked); + if (!i915_sw_fence_done(&ce->guc_state.blocked)) + i915_sw_fence_complete(&ce->guc_state.blocked); } static void guc_blocked_fence_reinit(struct intel_context *ce) { lockdep_assert_held(&ce->guc_state.lock); - GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_blocked)); + GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_state.blocked)); /* * This fence is always complete unless a pending schedule disable is * outstanding. We arm the fence here and complete it when we receive * the pending schedule disable complete message. */ - i915_sw_fence_fini(&ce->guc_blocked); - i915_sw_fence_reinit(&ce->guc_blocked); - i915_sw_fence_await(&ce->guc_blocked); - i915_sw_fence_commit(&ce->guc_blocked); + i915_sw_fence_fini(&ce->guc_state.blocked); + i915_sw_fence_reinit(&ce->guc_state.blocked); + i915_sw_fence_await(&ce->guc_state.blocked); + i915_sw_fence_commit(&ce->guc_state.blocked); } static u16 prep_context_pending_disable(struct intel_context *ce) @@ -1545,7 +1545,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) if (enabled) clr_context_enabled(ce); spin_unlock_irqrestore(&ce->guc_state.lock, flags); - return &ce->guc_blocked; + return &ce->guc_state.blocked; } /* @@ -1561,7 +1561,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) with_intel_runtime_pm(runtime_pm, wakeref) __guc_context_sched_disable(guc, ce, guc_id); - return &ce->guc_blocked; + return &ce->guc_state.blocked; } #define SCHED_STATE_MULTI_BLOCKED_MASK \ -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Cc: <daniele.ceraolospurio@intel.com> Subject: [Intel-gfx] [PATCH 19/27] drm/i915/guc: Move guc_blocked fence to struct guc_state Date: Wed, 25 Aug 2021 20:23:19 -0700 [thread overview] Message-ID: <20210826032327.18078-20-matthew.brost@intel.com> (raw) In-Reply-To: <20210826032327.18078-1-matthew.brost@intel.com> Move guc_blocked fence to struct guc_state as the lock which protects the fence lives there. s/ce->guc_blocked/ce->guc_state.blocked/g v2: (Daniele) - s/blocked_fence/blocked/g Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/intel_context.c | 5 +++-- drivers/gpu/drm/i915/gt/intel_context_types.h | 5 ++--- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +++++++++--------- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c index 745e84c72c90..3048267ddc7e 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.c +++ b/drivers/gpu/drm/i915/gt/intel_context.c @@ -405,8 +405,9 @@ intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) * Initialize fence to be complete as this is expected to be complete * unless there is a pending schedule disable outstanding. */ - i915_sw_fence_init(&ce->guc_blocked, sw_fence_dummy_notify); - i915_sw_fence_commit(&ce->guc_blocked); + i915_sw_fence_init(&ce->guc_state.blocked, + sw_fence_dummy_notify); + i915_sw_fence_commit(&ce->guc_state.blocked); i915_active_init(&ce->active, __intel_context_active, __intel_context_retire, 0); diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h index 3a73f3117873..5aecb9038b5b 100644 --- a/drivers/gpu/drm/i915/gt/intel_context_types.h +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h @@ -167,6 +167,8 @@ struct intel_context { * fence related to GuC submission */ struct list_head fences; + /* GuC context blocked fence */ + struct i915_sw_fence blocked; } guc_state; struct { @@ -190,9 +192,6 @@ struct intel_context { */ struct list_head guc_id_link; - /* GuC context blocked fence */ - struct i915_sw_fence guc_blocked; - /* * GuC priority management */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index c86aae0899e5..9d1eadd4b7c4 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -1488,24 +1488,24 @@ static void guc_blocked_fence_complete(struct intel_context *ce) { lockdep_assert_held(&ce->guc_state.lock); - if (!i915_sw_fence_done(&ce->guc_blocked)) - i915_sw_fence_complete(&ce->guc_blocked); + if (!i915_sw_fence_done(&ce->guc_state.blocked)) + i915_sw_fence_complete(&ce->guc_state.blocked); } static void guc_blocked_fence_reinit(struct intel_context *ce) { lockdep_assert_held(&ce->guc_state.lock); - GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_blocked)); + GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_state.blocked)); /* * This fence is always complete unless a pending schedule disable is * outstanding. We arm the fence here and complete it when we receive * the pending schedule disable complete message. */ - i915_sw_fence_fini(&ce->guc_blocked); - i915_sw_fence_reinit(&ce->guc_blocked); - i915_sw_fence_await(&ce->guc_blocked); - i915_sw_fence_commit(&ce->guc_blocked); + i915_sw_fence_fini(&ce->guc_state.blocked); + i915_sw_fence_reinit(&ce->guc_state.blocked); + i915_sw_fence_await(&ce->guc_state.blocked); + i915_sw_fence_commit(&ce->guc_state.blocked); } static u16 prep_context_pending_disable(struct intel_context *ce) @@ -1545,7 +1545,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) if (enabled) clr_context_enabled(ce); spin_unlock_irqrestore(&ce->guc_state.lock, flags); - return &ce->guc_blocked; + return &ce->guc_state.blocked; } /* @@ -1561,7 +1561,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) with_intel_runtime_pm(runtime_pm, wakeref) __guc_context_sched_disable(guc, ce, guc_id); - return &ce->guc_blocked; + return &ce->guc_state.blocked; } #define SCHED_STATE_MULTI_BLOCKED_MASK \ -- 2.32.0
next prev parent reply other threads:[~2021-08-26 3:29 UTC|newest] Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-26 3:23 [PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 01/27] drm/i915/guc: Fix blocked context accounting Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 02/27] drm/i915/guc: Fix outstanding G2H accounting Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 23:09 ` Daniele Ceraolo Spurio 2021-08-26 23:09 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-27 1:36 ` Matthew Brost 2021-08-27 1:36 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 03/27] drm/i915/guc: Unwind context requests in reverse order Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 04/27] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 05/27] drm/i915/guc: Process all G2H message at once in work queue Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 06/27] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 23:11 ` Daniele Ceraolo Spurio 2021-08-26 23:11 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-26 3:23 ` [PATCH 07/27] Revert "drm/i915/gt: Propagate change in error status to children on unhold" Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 08/27] drm/i915/selftests: Add a cancel request selftest that triggers a reset Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 9:32 ` Tvrtko Ursulin 2021-08-26 14:00 ` Matthew Brost 2021-08-26 3:23 ` [PATCH 09/27] drm/i915/guc: Kick tasklet after queuing a request Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 10/27] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 11/27] drm/i915/guc: Copy whole golden context, set engine state size of subset Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 23:21 ` Daniele Ceraolo Spurio 2021-08-26 23:21 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-26 23:33 ` John Harrison 2021-08-26 3:23 ` [PATCH 12/27] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 13/27] drm/i915/guc: Take context ref when cancelling request Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] [PATCH 14/27] drm/i915/guc: Don't touch guc_state.sched_state without a lock Matthew Brost 2021-08-26 3:23 ` Matthew Brost 2021-08-26 3:23 ` [PATCH 15/27] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 16/27] drm/i915: Allocate error capture in nowait context Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 16:18 ` Matthew Brost 2021-08-26 16:21 ` Daniel Vetter 2021-08-26 3:23 ` [Intel-gfx] [PATCH 17/27] drm/i915/guc: Flush G2H work queue during reset Matthew Brost 2021-08-26 3:23 ` Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] [PATCH 18/27] drm/i915/guc: Release submit fence from an irq_work Matthew Brost 2021-08-26 3:23 ` Matthew Brost 2021-08-26 3:23 ` Matthew Brost [this message] 2021-08-26 3:23 ` [Intel-gfx] [PATCH 19/27] drm/i915/guc: Move guc_blocked fence to struct guc_state Matthew Brost 2021-08-26 3:23 ` [PATCH 20/27] drm/i915/guc: Rework and simplify locking Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 21/27] drm/i915/guc: Proper xarray usage for contexts_lookup Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 22/27] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 23/27] drm/i915/guc: Move GuC priority fields in context under guc_active Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 23:26 ` Daniele Ceraolo Spurio 2021-08-26 23:26 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-08-26 3:23 ` [PATCH 24/27] drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 25/27] drm/i915/guc: Drop guc_active move everything into guc_state Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-26 3:23 ` [PATCH 26/27] drm/i915/guc: Add GuC kernel doc Matthew Brost 2021-08-26 3:23 ` [Intel-gfx] " Matthew Brost 2021-08-31 19:04 ` John Harrison 2021-08-26 3:23 ` [Intel-gfx] [PATCH 27/27] drm/i915/guc: Drop static inline functions intel_guc_submission.c Matthew Brost 2021-08-26 3:23 ` Matthew Brost 2021-08-31 19:09 ` [Intel-gfx] " John Harrison 2021-08-26 4:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev5) Patchwork 2021-08-26 4:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-08-26 5:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-26 10:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-08-26 17:56 ` Matthew Brost 2021-08-26 15:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev6) Patchwork 2021-08-26 15:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-08-26 16:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-08-26 17:44 ` Matthew Brost 2021-08-26 19:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev7) Patchwork 2021-08-26 19:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-08-26 19:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-27 4:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2021-08-19 6:16 [PATCH 00/27] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost 2021-08-19 6:16 ` [PATCH 19/27] drm/i915/guc: Move guc_blocked fence to struct guc_state Matthew Brost 2021-08-21 0:30 ` Daniele Ceraolo Spurio
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210826032327.18078-20-matthew.brost@intel.com \ --to=matthew.brost@intel.com \ --cc=daniele.ceraolospurio@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.