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From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Li Yang <leoyang.li@nxp.com>, Borislav Petkov <bp@alien8.de>,
	York Sun <york.sun@nxp.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: dts: freescale: ls1046a: drop unused big-endian property from DDR controller
Date: Thu, 26 Aug 2021 13:32:31 +0200	[thread overview]
Message-ID: <20210826113231.93232-1-krzysztof.kozlowski@canonical.com> (raw)
In-Reply-To: <20210826113049.92962-1-krzysztof.kozlowski@canonical.com>

The big-endian is default setting for DDR controller as expressed in
bindings and such property was never documented for Freescale DDR memory
controller.  The driver also does not parse this property at all.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 687fea6d8afa..b06c285b6534 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -277,7 +277,6 @@ ddr: memory-controller@1080000 {
 			compatible = "fsl,qoriq-memory-controller";
 			reg = <0x0 0x1080000 0x0 0x1000>;
 			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
-			big-endian;
 		};
 
 		ifc: ifc@1530000 {
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Li Yang <leoyang.li@nxp.com>, Borislav Petkov <bp@alien8.de>,
	York Sun <york.sun@nxp.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: dts: freescale: ls1046a: drop unused big-endian property from DDR controller
Date: Thu, 26 Aug 2021 13:32:31 +0200	[thread overview]
Message-ID: <20210826113231.93232-1-krzysztof.kozlowski@canonical.com> (raw)
In-Reply-To: <20210826113049.92962-1-krzysztof.kozlowski@canonical.com>

The big-endian is default setting for DDR controller as expressed in
bindings and such property was never documented for Freescale DDR memory
controller.  The driver also does not parse this property at all.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 687fea6d8afa..b06c285b6534 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -277,7 +277,6 @@ ddr: memory-controller@1080000 {
 			compatible = "fsl,qoriq-memory-controller";
 			reg = <0x0 0x1080000 0x0 0x1000>;
 			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
-			big-endian;
 		};
 
 		ifc: ifc@1530000 {
-- 
2.30.2


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  parent reply	other threads:[~2021-08-26 11:33 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 11:30 [PATCH 1/3] dt-bindings: memory: fsl: convert DDR controller to dtschema Krzysztof Kozlowski
2021-08-26 11:30 ` Krzysztof Kozlowski
2021-08-26 11:30 ` [PATCH 2/3] ARM: dts: ls1021a: drop unused big-endian property from DDR controller Krzysztof Kozlowski
2021-08-26 11:30   ` Krzysztof Kozlowski
2021-08-26 11:32 ` Krzysztof Kozlowski [this message]
2021-08-26 11:32   ` [PATCH 3/3] arm64: dts: freescale: ls1046a: " Krzysztof Kozlowski
2021-09-03 17:45 ` [PATCH 1/3] dt-bindings: memory: fsl: convert DDR controller to dtschema Rob Herring
2021-09-03 17:45   ` Rob Herring

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