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From: Mikhail Rudenko <mike.rudenko@gmail.com>
To: linux-phy@lists.infradead.org
Cc: linux-media@vger.kernel.org,
	Mikhail Rudenko <mike.rudenko@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Helen Koike <helen.koike@collabora.com>,
	Ezequiel Garcia <ezequiel@collabora.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 4/5] dt-bindings: phy: phy-rockchip-dphy-rx0: add support for tx1rx1 phy
Date: Mon, 30 Aug 2021 21:07:53 +0300	[thread overview]
Message-ID: <20210830180758.251390-5-mike.rudenko@gmail.com> (raw)
In-Reply-To: <20210830180758.251390-1-mike.rudenko@gmail.com>

RK3399 TX1RX1 D-PHY is not a child of GRF and uses reg, thus add
corresponding properties conditionally. It also requires DSI clock to
operate, so check for it. Since we now support both rx0 and tx1rx1,
rename the schema to rockchip-mipi-dphy-rx.yaml.

Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com>
---
 ...hy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} | 39 +++++++++++++++++--
 1 file changed, 35 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/phy/{rockchip-mipi-dphy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} (65%)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
similarity index 65%
rename from Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
rename to Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
index 7d888d358823..f42319448fc9 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
@@ -1,10 +1,10 @@
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
+$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
+title: Rockchip SoC MIPI RX0/TX1RX1 D-PHY Device Tree Bindings
 
 maintainers:
   - Helen Koike <helen.koike@collabora.com>
@@ -16,19 +16,28 @@ description: |
 
 properties:
   compatible:
-    const: rockchip,rk3399-mipi-dphy-rx0
+    enum:
+      - rockchip,rk3399-mipi-dphy-rx0
+      - rockchip,rk3399-mipi-dphy-tx1rx1
+
+  reg:
+    maxItems: 1
 
   clocks:
+    minItems: 3
     items:
       - description: MIPI D-PHY ref clock
-      - description: MIPI D-PHY RX0 cfg clock
+      - description: MIPI D-PHY RX0/TX1RX1 cfg clock
       - description: Video in/out general register file clock
+      - description: MIPI D-PHY DSI clock
 
   clock-names:
+    minItems: 3
     items:
       - const: dphy-ref
       - const: dphy-cfg
       - const: grf
+      - const: dsi
 
   '#phy-cells':
     const: 0
@@ -37,6 +46,12 @@ properties:
     description: Video in/out power domain.
     maxItems: 1
 
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      The phandle of the syscon node for the general register file
+      (GRF), required for TX1RX1 MIPI D-PHY on RK3399.
+
 required:
   - compatible
   - clocks
@@ -44,6 +59,22 @@ required:
   - '#phy-cells'
   - power-domains
 
+if:
+  properties:
+    compatible:
+      contains:
+          const: rockchip,rk3399-mipi-dphy-tx1rx1
+then:
+  required:
+    - reg
+    - rockchip,grf
+
+  properties:
+    clocks:
+      minItems: 4
+    clock-names:
+      minItems: 4
+
 additionalProperties: false
 
 examples:
-- 
2.33.0


WARNING: multiple messages have this Message-ID (diff)
From: Mikhail Rudenko <mike.rudenko@gmail.com>
To: linux-phy@lists.infradead.org
Cc: linux-media@vger.kernel.org,
	Mikhail Rudenko <mike.rudenko@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Helen Koike <helen.koike@collabora.com>,
	Ezequiel Garcia <ezequiel@collabora.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 4/5] dt-bindings: phy: phy-rockchip-dphy-rx0: add support for tx1rx1 phy
Date: Mon, 30 Aug 2021 21:07:53 +0300	[thread overview]
Message-ID: <20210830180758.251390-5-mike.rudenko@gmail.com> (raw)
In-Reply-To: <20210830180758.251390-1-mike.rudenko@gmail.com>

RK3399 TX1RX1 D-PHY is not a child of GRF and uses reg, thus add
corresponding properties conditionally. It also requires DSI clock to
operate, so check for it. Since we now support both rx0 and tx1rx1,
rename the schema to rockchip-mipi-dphy-rx.yaml.

Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com>
---
 ...hy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} | 39 +++++++++++++++++--
 1 file changed, 35 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/phy/{rockchip-mipi-dphy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} (65%)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
similarity index 65%
rename from Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
rename to Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
index 7d888d358823..f42319448fc9 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
@@ -1,10 +1,10 @@
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
+$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
+title: Rockchip SoC MIPI RX0/TX1RX1 D-PHY Device Tree Bindings
 
 maintainers:
   - Helen Koike <helen.koike@collabora.com>
@@ -16,19 +16,28 @@ description: |
 
 properties:
   compatible:
-    const: rockchip,rk3399-mipi-dphy-rx0
+    enum:
+      - rockchip,rk3399-mipi-dphy-rx0
+      - rockchip,rk3399-mipi-dphy-tx1rx1
+
+  reg:
+    maxItems: 1
 
   clocks:
+    minItems: 3
     items:
       - description: MIPI D-PHY ref clock
-      - description: MIPI D-PHY RX0 cfg clock
+      - description: MIPI D-PHY RX0/TX1RX1 cfg clock
       - description: Video in/out general register file clock
+      - description: MIPI D-PHY DSI clock
 
   clock-names:
+    minItems: 3
     items:
       - const: dphy-ref
       - const: dphy-cfg
       - const: grf
+      - const: dsi
 
   '#phy-cells':
     const: 0
@@ -37,6 +46,12 @@ properties:
     description: Video in/out power domain.
     maxItems: 1
 
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      The phandle of the syscon node for the general register file
+      (GRF), required for TX1RX1 MIPI D-PHY on RK3399.
+
 required:
   - compatible
   - clocks
@@ -44,6 +59,22 @@ required:
   - '#phy-cells'
   - power-domains
 
+if:
+  properties:
+    compatible:
+      contains:
+          const: rockchip,rk3399-mipi-dphy-tx1rx1
+then:
+  required:
+    - reg
+    - rockchip,grf
+
+  properties:
+    clocks:
+      minItems: 4
+    clock-names:
+      minItems: 4
+
 additionalProperties: false
 
 examples:
-- 
2.33.0


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Mikhail Rudenko <mike.rudenko@gmail.com>
To: linux-phy@lists.infradead.org
Cc: linux-media@vger.kernel.org,
	Mikhail Rudenko <mike.rudenko@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Helen Koike <helen.koike@collabora.com>,
	Ezequiel Garcia <ezequiel@collabora.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 4/5] dt-bindings: phy: phy-rockchip-dphy-rx0: add support for tx1rx1 phy
Date: Mon, 30 Aug 2021 21:07:53 +0300	[thread overview]
Message-ID: <20210830180758.251390-5-mike.rudenko@gmail.com> (raw)
In-Reply-To: <20210830180758.251390-1-mike.rudenko@gmail.com>

RK3399 TX1RX1 D-PHY is not a child of GRF and uses reg, thus add
corresponding properties conditionally. It also requires DSI clock to
operate, so check for it. Since we now support both rx0 and tx1rx1,
rename the schema to rockchip-mipi-dphy-rx.yaml.

Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com>
---
 ...hy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} | 39 +++++++++++++++++--
 1 file changed, 35 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/phy/{rockchip-mipi-dphy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} (65%)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
similarity index 65%
rename from Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
rename to Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
index 7d888d358823..f42319448fc9 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
@@ -1,10 +1,10 @@
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
+$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
+title: Rockchip SoC MIPI RX0/TX1RX1 D-PHY Device Tree Bindings
 
 maintainers:
   - Helen Koike <helen.koike@collabora.com>
@@ -16,19 +16,28 @@ description: |
 
 properties:
   compatible:
-    const: rockchip,rk3399-mipi-dphy-rx0
+    enum:
+      - rockchip,rk3399-mipi-dphy-rx0
+      - rockchip,rk3399-mipi-dphy-tx1rx1
+
+  reg:
+    maxItems: 1
 
   clocks:
+    minItems: 3
     items:
       - description: MIPI D-PHY ref clock
-      - description: MIPI D-PHY RX0 cfg clock
+      - description: MIPI D-PHY RX0/TX1RX1 cfg clock
       - description: Video in/out general register file clock
+      - description: MIPI D-PHY DSI clock
 
   clock-names:
+    minItems: 3
     items:
       - const: dphy-ref
       - const: dphy-cfg
       - const: grf
+      - const: dsi
 
   '#phy-cells':
     const: 0
@@ -37,6 +46,12 @@ properties:
     description: Video in/out power domain.
     maxItems: 1
 
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      The phandle of the syscon node for the general register file
+      (GRF), required for TX1RX1 MIPI D-PHY on RK3399.
+
 required:
   - compatible
   - clocks
@@ -44,6 +59,22 @@ required:
   - '#phy-cells'
   - power-domains
 
+if:
+  properties:
+    compatible:
+      contains:
+          const: rockchip,rk3399-mipi-dphy-tx1rx1
+then:
+  required:
+    - reg
+    - rockchip,grf
+
+  properties:
+    clocks:
+      minItems: 4
+    clock-names:
+      minItems: 4
+
 additionalProperties: false
 
 examples:
-- 
2.33.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Mikhail Rudenko <mike.rudenko@gmail.com>
To: linux-phy@lists.infradead.org
Cc: linux-media@vger.kernel.org,
	Mikhail Rudenko <mike.rudenko@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Helen Koike <helen.koike@collabora.com>,
	Ezequiel Garcia <ezequiel@collabora.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 4/5] dt-bindings: phy: phy-rockchip-dphy-rx0: add support for tx1rx1 phy
Date: Mon, 30 Aug 2021 21:07:53 +0300	[thread overview]
Message-ID: <20210830180758.251390-5-mike.rudenko@gmail.com> (raw)
In-Reply-To: <20210830180758.251390-1-mike.rudenko@gmail.com>

RK3399 TX1RX1 D-PHY is not a child of GRF and uses reg, thus add
corresponding properties conditionally. It also requires DSI clock to
operate, so check for it. Since we now support both rx0 and tx1rx1,
rename the schema to rockchip-mipi-dphy-rx.yaml.

Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com>
---
 ...hy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} | 39 +++++++++++++++++--
 1 file changed, 35 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/phy/{rockchip-mipi-dphy-rx0.yaml => rockchip-mipi-dphy-rx.yaml} (65%)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
similarity index 65%
rename from Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
rename to Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
index 7d888d358823..f42319448fc9 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx.yaml
@@ -1,10 +1,10 @@
 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
+$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
+title: Rockchip SoC MIPI RX0/TX1RX1 D-PHY Device Tree Bindings
 
 maintainers:
   - Helen Koike <helen.koike@collabora.com>
@@ -16,19 +16,28 @@ description: |
 
 properties:
   compatible:
-    const: rockchip,rk3399-mipi-dphy-rx0
+    enum:
+      - rockchip,rk3399-mipi-dphy-rx0
+      - rockchip,rk3399-mipi-dphy-tx1rx1
+
+  reg:
+    maxItems: 1
 
   clocks:
+    minItems: 3
     items:
       - description: MIPI D-PHY ref clock
-      - description: MIPI D-PHY RX0 cfg clock
+      - description: MIPI D-PHY RX0/TX1RX1 cfg clock
       - description: Video in/out general register file clock
+      - description: MIPI D-PHY DSI clock
 
   clock-names:
+    minItems: 3
     items:
       - const: dphy-ref
       - const: dphy-cfg
       - const: grf
+      - const: dsi
 
   '#phy-cells':
     const: 0
@@ -37,6 +46,12 @@ properties:
     description: Video in/out power domain.
     maxItems: 1
 
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      The phandle of the syscon node for the general register file
+      (GRF), required for TX1RX1 MIPI D-PHY on RK3399.
+
 required:
   - compatible
   - clocks
@@ -44,6 +59,22 @@ required:
   - '#phy-cells'
   - power-domains
 
+if:
+  properties:
+    compatible:
+      contains:
+          const: rockchip,rk3399-mipi-dphy-tx1rx1
+then:
+  required:
+    - reg
+    - rockchip,grf
+
+  properties:
+    clocks:
+      minItems: 4
+    clock-names:
+      minItems: 4
+
 additionalProperties: false
 
 examples:
-- 
2.33.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-08-30 18:08 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-30 18:07 [PATCH v1 0/5] phy: phy-rockchip-dphy-rx0: add support for tx1rx1 rx mode Mikhail Rudenko
2021-08-30 18:07 ` Mikhail Rudenko
2021-08-30 18:07 ` Mikhail Rudenko
2021-08-30 18:07 ` Mikhail Rudenko
2021-08-30 18:07 ` [PATCH v1 1/5] phy: phy-rockchip-dphy-rx0: refactor for tx1rx1 addition Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 20:45   ` Heiko Stübner
2021-08-30 20:45     ` Heiko Stübner
2021-08-30 20:45     ` Heiko Stübner
2021-08-30 20:45     ` Heiko Stübner
2021-08-31  0:41     ` Ezequiel Garcia
2021-08-31  0:41       ` Ezequiel Garcia
2021-08-31  0:41       ` Ezequiel Garcia
2021-08-31  0:41       ` Ezequiel Garcia
2021-08-30 18:07 ` [PATCH v1 2/5] phy: phy-rockchip-dphy-rx0: add support for tx1rx1 in receive mode Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07 ` [PATCH v1 3/5] phy: rename phy-rockchip-dphy-rx0 to phy-rockchip-dphy-rx Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07 ` Mikhail Rudenko [this message]
2021-08-30 18:07   ` [PATCH v1 4/5] dt-bindings: phy: phy-rockchip-dphy-rx0: add support for tx1rx1 phy Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 21:00   ` Johan Jonker
2021-08-30 21:00     ` Johan Jonker
2021-08-30 21:00     ` Johan Jonker
2021-08-30 21:00     ` Johan Jonker
2021-08-30 22:06     ` Johan Jonker
2021-08-30 22:06       ` Johan Jonker
2021-08-30 22:06       ` Johan Jonker
2021-08-30 22:06       ` Johan Jonker
2021-08-31  0:03   ` Rob Herring
2021-08-31  0:03     ` Rob Herring
2021-08-31  0:03     ` Rob Herring
2021-08-31  0:03     ` Rob Herring
2021-08-30 18:07 ` [PATCH v1 5/5] arm64: dts: rockchip: add mipi-dphy-tx1rx1 for rk3399 Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 18:07   ` Mikhail Rudenko
2021-08-30 21:12   ` Johan Jonker
2021-08-30 21:12     ` Johan Jonker
2021-08-30 21:12     ` Johan Jonker
2021-08-30 21:12     ` Johan Jonker
2021-08-30 21:50     ` Johan Jonker
2021-08-30 21:50       ` Johan Jonker
2021-08-30 21:50       ` Johan Jonker
2021-08-30 21:50       ` Johan Jonker
2021-08-31 12:58 ` [PATCH v1 0/5] phy: phy-rockchip-dphy-rx0: add support for tx1rx1 rx mode Mikhail Rudenko
2021-08-31 12:58   ` Mikhail Rudenko
2021-08-31 12:58   ` Mikhail Rudenko
2021-08-31 12:58   ` Mikhail Rudenko

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