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From: WANG Xuerui <git@xen0n.name>
To: qemu-devel@nongnu.org
Cc: WANG Xuerui <git@xen0n.name>
Subject: [PATCH v2 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops
Date: Wed, 22 Sep 2021 04:19:01 +0800	[thread overview]
Message-ID: <20210921201915.601245-17-git@xen0n.name> (raw)
In-Reply-To: <20210921201915.601245-1-git@xen0n.name>

Signed-off-by: WANG Xuerui <git@xen0n.name>
---
 tcg/loongarch64/tcg-target-con-set.h |  1 +
 tcg/loongarch64/tcg-target.c.inc     | 91 ++++++++++++++++++++++++++++
 2 files changed, 92 insertions(+)

diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h
index 2975e03127..42f8e28741 100644
--- a/tcg/loongarch64/tcg-target-con-set.h
+++ b/tcg/loongarch64/tcg-target-con-set.h
@@ -17,6 +17,7 @@
 C_O0_I1(r)
 C_O1_I1(r, r)
 C_O1_I2(r, r, rC)
+C_O1_I2(r, r, ri)
 C_O1_I2(r, r, rU)
 C_O1_I2(r, r, rW)
 C_O1_I2(r, 0, rZ)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 65545f7636..f06c61ee2b 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -561,6 +561,85 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
         tcg_out_clzctz(s, OPC_CTZ_D, a0, a1, a2, c2, false);
         break;
 
+    case INDEX_op_shl_i32:
+        if (c2) {
+            tcg_out_opc_slli_w(s, a0, a1, a2 & 0x1f);
+        } else {
+            tcg_out_opc_sll_w(s, a0, a1, a2);
+        }
+        break;
+    case INDEX_op_shl_i64:
+        if (c2) {
+            tcg_out_opc_slli_d(s, a0, a1, a2 & 0x3f);
+        } else {
+            tcg_out_opc_sll_d(s, a0, a1, a2);
+        }
+        break;
+
+    case INDEX_op_shr_i32:
+        if (c2) {
+            tcg_out_opc_srli_w(s, a0, a1, a2 & 0x1f);
+        } else {
+            tcg_out_opc_srl_w(s, a0, a1, a2);
+        }
+        break;
+    case INDEX_op_shr_i64:
+        if (c2) {
+            tcg_out_opc_srli_d(s, a0, a1, a2 & 0x3f);
+        } else {
+            tcg_out_opc_srl_d(s, a0, a1, a2);
+        }
+        break;
+
+    case INDEX_op_sar_i32:
+        if (c2) {
+            tcg_out_opc_srai_w(s, a0, a1, a2 & 0x1f);
+        } else {
+            tcg_out_opc_sra_w(s, a0, a1, a2);
+        }
+        break;
+    case INDEX_op_sar_i64:
+        if (c2) {
+            tcg_out_opc_srai_d(s, a0, a1, a2 & 0x3f);
+        } else {
+            tcg_out_opc_sra_d(s, a0, a1, a2);
+        }
+        break;
+
+    case INDEX_op_rotl_i32:
+        /* transform into equivalent rotr/rotri */
+        if (c2) {
+            tcg_out_opc_rotri_w(s, a0, a1, (32 - a2) & 0x1f);
+        } else {
+            tcg_out_opc_sub_w(s, TCG_REG_TMP0, TCG_REG_ZERO, a2);
+            tcg_out_opc_rotr_w(s, a0, a1, TCG_REG_TMP0);
+        }
+        break;
+    case INDEX_op_rotl_i64:
+        /* transform into equivalent rotr/rotri */
+        if (c2) {
+            tcg_out_opc_rotri_d(s, a0, a1, (64 - a2) & 0x3f);
+        } else {
+            tcg_out_opc_sub_w(s, TCG_REG_TMP0, TCG_REG_ZERO, a2);
+            tcg_out_opc_rotr_d(s, a0, a1, TCG_REG_TMP0);
+        }
+        break;
+
+    case INDEX_op_rotr_i32:
+        if (c2) {
+            tcg_out_opc_rotri_w(s, a0, a1, a2 & 0x1f);
+        } else {
+            tcg_out_opc_rotr_w(s, a0, a1, a2);
+        }
+        break;
+    case INDEX_op_rotr_i64:
+        if (c2) {
+            tcg_out_opc_rotri_d(s, a0, a1, a2 & 0x3f);
+        } else {
+            tcg_out_opc_rotr_d(s, a0, a1, a2);
+        }
+        break;
+
     case INDEX_op_mov_i32:  /* Always emitted via tcg_out_mov.  */
     case INDEX_op_mov_i64:
     default:
@@ -610,6 +689,18 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
          */
         return C_O1_I2(r, r, rC);
 
+    case INDEX_op_shl_i32:
+    case INDEX_op_shl_i64:
+    case INDEX_op_shr_i32:
+    case INDEX_op_shr_i64:
+    case INDEX_op_sar_i32:
+    case INDEX_op_sar_i64:
+    case INDEX_op_rotl_i32:
+    case INDEX_op_rotl_i64:
+    case INDEX_op_rotr_i32:
+    case INDEX_op_rotr_i64:
+        return C_O1_I2(r, r, ri);
+
     case INDEX_op_and_i32:
     case INDEX_op_and_i64:
     case INDEX_op_nor_i32:
-- 
2.33.0



  parent reply	other threads:[~2021-09-21 20:27 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21 20:18 [PATCH v2 00/30] LoongArch64 port of QEMU TCG WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 01/30] elf: Add machine type value for LoongArch WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 03/30] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-09-22  3:55   ` Richard Henderson
2021-09-22  4:33     ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 06/30] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-09-22  3:59   ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 07/30] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-09-22  4:02   ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 08/30] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-09-22  4:03   ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-09-22  4:25   ` Richard Henderson
2021-09-22 15:16     ` WANG Xuerui
2021-09-22 15:17       ` Richard Henderson
2021-09-22 17:22         ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 10/30] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 11/30] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops WANG Xuerui
2021-09-22  4:35   ` Richard Henderson
2021-09-22 17:23     ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 13/30] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64 WANG Xuerui
2021-09-22 14:54   ` Richard Henderson
2021-09-22 17:24     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 15/30] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-09-22 14:57   ` Richard Henderson
2021-09-21 20:19 ` WANG Xuerui [this message]
2021-09-22 14:59   ` [PATCH v2 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops Richard Henderson
2021-09-21 20:19 ` [PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-09-22 15:01   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 19/30] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 20/30] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-09-22 15:13   ` Richard Henderson
2021-09-22 17:26     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 21/30] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-09-22 15:16   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 22/30] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-09-22 16:29   ` Richard Henderson
2021-09-22 17:32     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 25/30] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 26/30] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 27/30] tcg/loongarch64: Register the JIT WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 28/30] linux-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-09-22 16:39   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler " WANG Xuerui
2021-09-22 16:51   ` Richard Henderson
2021-09-22 17:35     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 30/30] configure, meson.build: Mark support " WANG Xuerui
2021-09-22 16:53   ` Richard Henderson

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