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From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, pali@kernel.org,
	"Marek Behún" <kabel@kernel.org>
Subject: [PATCH v2 04/13] PCI: aardvark: Fix preserving PCI_EXP_RTCTL_CRSSVE flag on emulated bridge
Date: Tue,  5 Oct 2021 20:09:43 +0200	[thread overview]
Message-ID: <20211005180952.6812-5-kabel@kernel.org> (raw)
In-Reply-To: <20211005180952.6812-1-kabel@kernel.org>

From: Pali Rohár <pali@kernel.org>

Commit 43f5c77bcbd2 ("PCI: aardvark: Fix reporting CRS value") started
using CRSSVE flag for handling CRS responses.

PCI_EXP_RTCTL_CRSSVE flag is stored only in emulated config space buffer
and there is handler for PCI_EXP_RTCTL register. So every read operation
from config space automatically clears CRSSVE flag as it is not defined in
PCI_EXP_RTCTL read handler.

Fix this by reading current CRSSVE bit flag from emulated space buffer and
appending it to PCI_EXP_RTCTL read response.

Fixes: 43f5c77bcbd2 ("PCI: aardvark: Fix reporting CRS value")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/pci/controller/pci-aardvark.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index a7903c531aa3..bb57ca6aed35 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -724,6 +724,7 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
 	case PCI_EXP_RTCTL: {
 		u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);
 		*value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE;
+		*value |= le16_to_cpu(bridge->pcie_conf.rootctl) & PCI_EXP_RTCTL_CRSSVE;
 		*value |= PCI_EXP_RTCAP_CRSVIS << 16;
 		return PCI_BRIDGE_EMUL_HANDLED;
 	}
-- 
2.32.0


  parent reply	other threads:[~2021-10-05 18:10 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-05 18:09 [PATCH v2 00/13] PCI: aardvark controller fixes Marek Behún
2021-10-05 18:09 ` [PATCH v2 01/13] PCI: Add PCI_EXP_DEVCTL_PAYLOAD_* macros Marek Behún
2021-10-05 18:09 ` [PATCH v2 02/13] PCI: aardvark: Fix PCIe Max Payload Size setting Marek Behún
2021-10-05 18:09 ` [PATCH v2 03/13] PCI: aardvark: Don't spam about PIO Response Status Marek Behún
2021-10-05 18:09 ` Marek Behún [this message]
2021-10-05 18:09 ` [PATCH v2 05/13] PCI: aardvark: Fix configuring Reference clock Marek Behún
2021-10-05 18:09 ` [PATCH v2 06/13] PCI: aardvark: Do not clear status bits of masked interrupts Marek Behún
2021-10-05 18:09 ` [PATCH v2 07/13] PCI: aardvark: Do not unmask unused interrupts Marek Behún
2021-10-06  9:13   ` Lorenzo Pieralisi
2021-10-06 10:28     ` Marek Behún
2021-10-07 13:27       ` Lorenzo Pieralisi
2021-10-05 18:09 ` [PATCH v2 08/13] PCI: aardvark: Deduplicate code in advk_pcie_rd_conf() Marek Behún
2021-10-05 18:09 ` [PATCH v2 09/13] PCI: aardvark: Implement re-issuing config requests on CRS response Marek Behún
2021-10-05 18:09 ` [PATCH v2 10/13] PCI: aardvark: Simplify initialization of rootcap on virtual bridge Marek Behún
2021-10-05 18:09 ` [PATCH v2 11/13] PCI: aardvark: Fix link training Marek Behún
2021-10-07 11:55   ` Lorenzo Pieralisi
2021-10-07 12:33     ` Marek Behún
2021-10-05 18:09 ` [PATCH v2 12/13] PCI: aardvark: Fix checking for link up via LTSSM state Marek Behún
2021-10-05 18:09 ` [PATCH v2 13/13] PCI: aardvark: Fix reporting Data Link Layer Link Active Marek Behún
2021-10-07 13:38 ` [PATCH v2 00/13] PCI: aardvark controller fixes Lorenzo Pieralisi
2021-10-07 17:36   ` Marek Behún

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