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From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v8 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine
Date: Mon, 11 Oct 2021 13:48:20 +0530	[thread overview]
Message-ID: <20211011081820.1135261-9-anup.patel@wdc.com> (raw)
In-Reply-To: <20211011081820.1135261-1-anup.patel@wdc.com>

We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test
SBI HSM Supend on QEMU.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 arch/riscv/Kconfig.socs           | 3 +++
 arch/riscv/configs/defconfig      | 1 +
 arch/riscv/configs/rv32_defconfig | 1 +
 3 files changed, 5 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 651da2ed93bc..357299833396 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -29,6 +29,9 @@ config SOC_VIRT
 	select RTC_DRV_GOLDFISH if RTC_CLASS
 	select SIFIVE_PLIC
 	select RISCV_ACLINT_SWI
+	select PM_GENERIC_DOMAINS if PM
+	select PM_GENERIC_DOMAINS_OF if PM && OF
+	select RISCV_SBI_CPUIDLE if CPU_IDLE
 	help
 	  This enables support for QEMU Virt Machine.
 
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 39b4c32e7997..96fb9ba6318b 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index fed827c82a9e..066b7be65f49 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v8 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine
Date: Mon, 11 Oct 2021 13:48:20 +0530	[thread overview]
Message-ID: <20211011081820.1135261-9-anup.patel@wdc.com> (raw)
In-Reply-To: <20211011081820.1135261-1-anup.patel@wdc.com>

We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test
SBI HSM Supend on QEMU.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 arch/riscv/Kconfig.socs           | 3 +++
 arch/riscv/configs/defconfig      | 1 +
 arch/riscv/configs/rv32_defconfig | 1 +
 3 files changed, 5 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 651da2ed93bc..357299833396 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -29,6 +29,9 @@ config SOC_VIRT
 	select RTC_DRV_GOLDFISH if RTC_CLASS
 	select SIFIVE_PLIC
 	select RISCV_ACLINT_SWI
+	select PM_GENERIC_DOMAINS if PM
+	select PM_GENERIC_DOMAINS_OF if PM && OF
+	select RISCV_SBI_CPUIDLE if CPU_IDLE
 	help
 	  This enables support for QEMU Virt Machine.
 
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 39b4c32e7997..96fb9ba6318b 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index fed827c82a9e..066b7be65f49 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
-- 
2.25.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v8 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine
Date: Mon, 11 Oct 2021 13:48:20 +0530	[thread overview]
Message-ID: <20211011081820.1135261-9-anup.patel@wdc.com> (raw)
In-Reply-To: <20211011081820.1135261-1-anup.patel@wdc.com>

We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test
SBI HSM Supend on QEMU.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 arch/riscv/Kconfig.socs           | 3 +++
 arch/riscv/configs/defconfig      | 1 +
 arch/riscv/configs/rv32_defconfig | 1 +
 3 files changed, 5 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 651da2ed93bc..357299833396 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -29,6 +29,9 @@ config SOC_VIRT
 	select RTC_DRV_GOLDFISH if RTC_CLASS
 	select SIFIVE_PLIC
 	select RISCV_ACLINT_SWI
+	select PM_GENERIC_DOMAINS if PM
+	select PM_GENERIC_DOMAINS_OF if PM && OF
+	select RISCV_SBI_CPUIDLE if CPU_IDLE
 	help
 	  This enables support for QEMU Virt Machine.
 
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 39b4c32e7997..96fb9ba6318b 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index fed827c82a9e..066b7be65f49 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-10-11  8:19 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-11  8:18 [PATCH v8 0/8] RISC-V CPU Idle Support Anup Patel
2021-10-11  8:18 ` Anup Patel
2021-10-11  8:18 ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 1/8] RISC-V: Enable CPU_IDLE drivers Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11 22:04   ` Heiko Stübner
2021-10-11 22:04     ` Heiko Stübner
2021-10-11 22:04     ` Heiko Stübner
2021-10-12  0:54     ` Anup Patel
2021-10-12  0:54       ` Anup Patel
2021-10-12  0:54       ` Anup Patel
2021-10-11 23:16   ` Heiko Stübner
2021-10-11 23:16     ` Heiko Stübner
2021-10-11 23:16     ` Heiko Stübner
2021-10-12  0:57     ` Anup Patel
2021-10-12  0:57       ` Anup Patel
2021-10-12  0:57       ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 2/8] RISC-V: Rename relocate() and make it global Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 4/8] RISC-V: Add SBI HSM suspend related defines Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 6/8] cpuidle: Add RISC-V SBI CPU idle driver Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18 ` [PATCH v8 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11  8:18   ` Anup Patel
2021-10-11 13:36   ` Rob Herring
2021-10-11 13:36     ` Rob Herring
2021-10-11 13:36     ` Rob Herring
2021-10-11  8:18 ` Anup Patel [this message]
2021-10-11  8:18   ` [PATCH v8 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine Anup Patel
2021-10-11  8:18   ` Anup Patel

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