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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
	Luis Machado <luis.machado@arm.com>,
	Salil Akerkar <Salil.Akerkar@arm.com>,
	Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v2 18/42] arm64/sme: Early CPU setup for SME
Date: Mon, 18 Oct 2021 20:08:34 +0100	[thread overview]
Message-ID: <20211018190858.2119209-19-broonie@kernel.org> (raw)
In-Reply-To: <20211018190858.2119209-1-broonie@kernel.org>

SME requires similar setup to that for SVE: disable traps to EL2 and
make sure that the maximum vector length is available to EL1, for SME we
have two traps - one for SME itself and one for TPIDR2.

In addition since we currently make no active use of priority control
for SCMUs we map all SME priorities lower ELs may configure to 0, the
architecture specified minimum priority, to ensure that nothing we
manage is able to configure itself to consume excessive resources.  This
will need to be revisited should there be a need to manage SME
priorities at runtime.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/el2_setup.h | 36 ++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 3198acb2aad8..895a27a1dcb5 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -143,6 +143,41 @@
 .Lskip_sve_\@:
 .endm
 
+/* SME register access and priority mapping */
+.macro __init_el2_nvhe_sme
+	mrs	x1, id_aa64pfr1_el1
+	ubfx	x1, x1, #ID_AA64PFR1_SME_SHIFT, #4
+	cbz	x1, .Lskip_sme_\@
+
+	bic	x0, x0, #CPTR_EL2_TSM		// Also disable SME traps
+	msr	cptr_el2, x0			// Disable copro. traps to EL2
+	isb
+
+	mrs	x1, sctlr_el2
+	orr	x1, x1, #SCTLR_ELx_ENTP2	// Disable TPIDR2 traps
+	msr	sctlr_el2, x1
+	isb
+
+	mov	x1, #SMCR_ELx_LEN_MASK		// Enable full SME vector
+	msr_s	SYS_SMCR_EL2, x1		// length for EL1.
+
+	mrs_s	x1, SYS_SMIDR_EL1		// Priority mapping supported?
+	ubfx    x1, x1, #SYS_SMIDR_EL1_SMPS_SHIFT, #1
+	cbz     x1, .Lskip_sme_\@
+
+	msr_s	SYS_SMPRIMAP_EL2, xzr		// Make all priorities equal
+
+	mrs	x1, id_aa64mmfr1_el1		// HCRX_EL2 present?
+	ubfx	x1, x1, #ID_AA64MMFR1_HCX_SHIFT, #4
+	cbz	x1, .Lskip_sme_\@
+
+	mrs_s	x1, SYS_HCRX_EL2
+	orr	x1, x1, #HCRX_EL2_SMPME_MASK	// Enable priority mapping
+	msr_s	SYS_HCRX_EL2, x1
+
+.Lskip_sme_\@:
+.endm
+
 /* Disable any fine grained traps */
 .macro __init_el2_fgt
 	mrs	x1, id_aa64mmfr0_el1
@@ -196,6 +231,7 @@
 	__init_el2_nvhe_idregs
 	__init_el2_nvhe_cptr
 	__init_el2_nvhe_sve
+	__init_el2_nvhe_sme
 	__init_el2_fgt
 	__init_el2_nvhe_prepare_eret
 .endm
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
	Luis Machado <luis.machado@arm.com>,
	Salil Akerkar <Salil.Akerkar@arm.com>,
	Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v2 18/42] arm64/sme: Early CPU setup for SME
Date: Mon, 18 Oct 2021 20:08:34 +0100	[thread overview]
Message-ID: <20211018190858.2119209-19-broonie@kernel.org> (raw)
In-Reply-To: <20211018190858.2119209-1-broonie@kernel.org>

SME requires similar setup to that for SVE: disable traps to EL2 and
make sure that the maximum vector length is available to EL1, for SME we
have two traps - one for SME itself and one for TPIDR2.

In addition since we currently make no active use of priority control
for SCMUs we map all SME priorities lower ELs may configure to 0, the
architecture specified minimum priority, to ensure that nothing we
manage is able to configure itself to consume excessive resources.  This
will need to be revisited should there be a need to manage SME
priorities at runtime.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/el2_setup.h | 36 ++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 3198acb2aad8..895a27a1dcb5 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -143,6 +143,41 @@
 .Lskip_sve_\@:
 .endm
 
+/* SME register access and priority mapping */
+.macro __init_el2_nvhe_sme
+	mrs	x1, id_aa64pfr1_el1
+	ubfx	x1, x1, #ID_AA64PFR1_SME_SHIFT, #4
+	cbz	x1, .Lskip_sme_\@
+
+	bic	x0, x0, #CPTR_EL2_TSM		// Also disable SME traps
+	msr	cptr_el2, x0			// Disable copro. traps to EL2
+	isb
+
+	mrs	x1, sctlr_el2
+	orr	x1, x1, #SCTLR_ELx_ENTP2	// Disable TPIDR2 traps
+	msr	sctlr_el2, x1
+	isb
+
+	mov	x1, #SMCR_ELx_LEN_MASK		// Enable full SME vector
+	msr_s	SYS_SMCR_EL2, x1		// length for EL1.
+
+	mrs_s	x1, SYS_SMIDR_EL1		// Priority mapping supported?
+	ubfx    x1, x1, #SYS_SMIDR_EL1_SMPS_SHIFT, #1
+	cbz     x1, .Lskip_sme_\@
+
+	msr_s	SYS_SMPRIMAP_EL2, xzr		// Make all priorities equal
+
+	mrs	x1, id_aa64mmfr1_el1		// HCRX_EL2 present?
+	ubfx	x1, x1, #ID_AA64MMFR1_HCX_SHIFT, #4
+	cbz	x1, .Lskip_sme_\@
+
+	mrs_s	x1, SYS_HCRX_EL2
+	orr	x1, x1, #HCRX_EL2_SMPME_MASK	// Enable priority mapping
+	msr_s	SYS_HCRX_EL2, x1
+
+.Lskip_sme_\@:
+.endm
+
 /* Disable any fine grained traps */
 .macro __init_el2_fgt
 	mrs	x1, id_aa64mmfr0_el1
@@ -196,6 +231,7 @@
 	__init_el2_nvhe_idregs
 	__init_el2_nvhe_cptr
 	__init_el2_nvhe_sve
+	__init_el2_nvhe_sme
 	__init_el2_fgt
 	__init_el2_nvhe_prepare_eret
 .endm
-- 
2.30.2


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-10-18 19:10 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18 19:08 [PATCH v2 00/42] arm64/sme: Initial support for the Scalable Matrix Extension Mark Brown
2021-10-18 19:08 ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 01/42] arm64/fp: Reindent fpsimd_save() Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 02/42] arm64/sve: Remove sve_load_from_fpsimd_state() Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 03/42] arm64/sve: Make sve_state_size() static Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 04/42] arm64/sve: Make access to FFR optional Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-19 10:14   ` Will Deacon
2021-10-19 10:14     ` Will Deacon
2021-10-19 13:17     ` Mark Brown
2021-10-19 13:17       ` Mark Brown
2021-10-19 14:39     ` Mark Rutland
2021-10-19 14:39       ` Mark Rutland
2021-10-19 15:31       ` Mark Brown
2021-10-19 15:31         ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 05/42] arm64/sve: Rename find_supported_vector_length() Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 06/42] arm64/sve: Use accessor functions for vector lengths in thread_struct Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 07/42] arm64/sve: Put system wide vector length information into structs Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 08/42] arm64/sve: Explicitly load vector length when restoring SVE state Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 09/42] arm64/sve: Track vector lengths for tasks in an array Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 10/42] arm64/sve: Make sysctl interface for SVE reusable by SME Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 11/42] arm64/sve: Generalise vector length configuration prctl() for SME Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 12/42] kselftest/arm64: Parameterise ptrace vector length information Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 13/42] kselftest/arm64: Allow signal tests to trigger from a function Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 14/42] tools/nolibc: Implement gettid() Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-19  5:06   ` Willy Tarreau
2021-10-19  5:06     ` Willy Tarreau
2021-10-18 19:08 ` [PATCH v2 15/42] arm64/sme: Provide ABI documentation for SME Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 16/42] arm64/sme: System register and exception syndrome definitions Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 17/42] arm64/sme: Define macros for manually encoding SME instructions Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` Mark Brown [this message]
2021-10-18 19:08   ` [PATCH v2 18/42] arm64/sme: Early CPU setup for SME Mark Brown
2021-10-18 19:08 ` [PATCH v2 19/42] arm64/sme: Basic enumeration support Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 20/42] arm64/sme: Identify supported SME vector lengths at boot Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 21/42] arm64/sme: Implement sysctl to set the default vector length Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 22/42] arm64/sme: Implement vector length configuration prctl()s Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 23/42] arm64/sme: Implement support for TPIDR2 Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 24/42] arm64/sme: Implement SVCR context switching Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 25/42] arm64/sme: Implement streaming SVE " Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 26/42] arm64/sme: Implement ZA " Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 27/42] arm64/sme: Implement traps and syscall handling for SME Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 28/42] arm64/sme: Implement streaming SVE signal handling Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 29/42] arm64/sme: Implement ZA " Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 30/42] arm64/sme: Implement ptrace support for streaming mode SVE registers Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 31/42] arm64/sme: Add ptrace support for ZA Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 32/42] arm64/sme: Disable streaming mode and ZA when flushing CPU state Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 33/42] arm64/sme: Save and restore streaming mode over EFI runtime calls Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 34/42] arm64/sme: Provide Kconfig for SME Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 35/42] kselftest/arm64: sme: Add streaming SME support to vlset Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 36/42] kselftest/arm64: Add tests for TPIDR2 Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 37/42] kselftest/arm64: Extend vector configuration API tests to cover SME Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 38/42] kselftest/arm64: sme: Provide streaming mode SVE stress test Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 39/42] kselftest/arm64: Add stress test for SME ZA context switching Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 40/42] kselftest/arm64: signal: Add SME signal handling tests Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 41/42] kselftest/arm64: Add streaming SVE to SVE ptrace tests Mark Brown
2021-10-18 19:08   ` Mark Brown
2021-10-18 19:08 ` [PATCH v2 42/42] kselftest/arm64: Add coverage for the ZA ptrace interface Mark Brown
2021-10-18 19:08   ` Mark Brown

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