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From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM
	BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...),
	Russell King <linux@armlinux.org.uk>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Frank Rowand <frowand.list@gmail.com>,
	linux-arm-kernel@lists.infradead.org (moderated list:ARM
	SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS),
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE)
Subject: [PATCH v6 05/13] irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS
Date: Wed, 20 Oct 2021 11:48:51 -0700	[thread overview]
Message-ID: <20211020184859.2705451-6-f.fainelli@gmail.com> (raw)
In-Reply-To: <20211020184859.2705451-1-f.fainelli@gmail.com>

Only MIPS based platforms using this interrupt controller as first level
interrupt controller can actually change the affinity of interrupts by
re-programming the affinity mask of the interrupt controller and use
another word group to have another CPU process the interrupt.

When this interrupt is used as a second level interrupt controller on
ARM/ARM64 there is no way to change the interrupt affinity. This fixes a
NULL pointer de-reference while trying to change the affinity since
there is only a single word group in that case, and we would have been
overruning the intc->cpus[] array.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/irqchip/irq-bcm7038-l1.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c
index 3c4e348c661e..357570dd8780 100644
--- a/drivers/irqchip/irq-bcm7038-l1.c
+++ b/drivers/irqchip/irq-bcm7038-l1.c
@@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d)
 	raw_spin_unlock_irqrestore(&intc->lock, flags);
 }
 
+#if defined(CONFIG_MIPS) && defined(CONFIG_SMP)
 static int bcm7038_l1_set_affinity(struct irq_data *d,
 				   const struct cpumask *dest,
 				   bool force)
@@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,
 
 	return 0;
 }
+#endif
 
 static int __init bcm7038_l1_init_one(struct device_node *dn,
 				      unsigned int idx,
@@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = {
 	.name			= "bcm7038-l1",
 	.irq_mask		= bcm7038_l1_mask,
 	.irq_unmask		= bcm7038_l1_unmask,
+#if defined(CONFIG_SMP) && defined(CONFIG_MIPS)
 	.irq_set_affinity	= bcm7038_l1_set_affinity,
+#endif
 #ifdef CONFIG_PM_SLEEP
 	.irq_set_wake		= bcm7038_l1_set_wake,
 #endif
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM
	BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...),
	 Russell King <linux@armlinux.org.uk>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Frank Rowand <frowand.list@gmail.com>,
	linux-arm-kernel@lists.infradead.org (moderated list:ARM
	SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS),
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE)
Subject: [PATCH v6 05/13] irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS
Date: Wed, 20 Oct 2021 11:48:51 -0700	[thread overview]
Message-ID: <20211020184859.2705451-6-f.fainelli@gmail.com> (raw)
In-Reply-To: <20211020184859.2705451-1-f.fainelli@gmail.com>

Only MIPS based platforms using this interrupt controller as first level
interrupt controller can actually change the affinity of interrupts by
re-programming the affinity mask of the interrupt controller and use
another word group to have another CPU process the interrupt.

When this interrupt is used as a second level interrupt controller on
ARM/ARM64 there is no way to change the interrupt affinity. This fixes a
NULL pointer de-reference while trying to change the affinity since
there is only a single word group in that case, and we would have been
overruning the intc->cpus[] array.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/irqchip/irq-bcm7038-l1.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c
index 3c4e348c661e..357570dd8780 100644
--- a/drivers/irqchip/irq-bcm7038-l1.c
+++ b/drivers/irqchip/irq-bcm7038-l1.c
@@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d)
 	raw_spin_unlock_irqrestore(&intc->lock, flags);
 }
 
+#if defined(CONFIG_MIPS) && defined(CONFIG_SMP)
 static int bcm7038_l1_set_affinity(struct irq_data *d,
 				   const struct cpumask *dest,
 				   bool force)
@@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,
 
 	return 0;
 }
+#endif
 
 static int __init bcm7038_l1_init_one(struct device_node *dn,
 				      unsigned int idx,
@@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = {
 	.name			= "bcm7038-l1",
 	.irq_mask		= bcm7038_l1_mask,
 	.irq_unmask		= bcm7038_l1_unmask,
+#if defined(CONFIG_SMP) && defined(CONFIG_MIPS)
 	.irq_set_affinity	= bcm7038_l1_set_affinity,
+#endif
 #ifdef CONFIG_PM_SLEEP
 	.irq_set_wake		= bcm7038_l1_set_wake,
 #endif
-- 
2.25.1


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  parent reply	other threads:[~2021-10-20 18:50 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-20 18:48 [PATCH v6 00/13] Modular Broadcom irqchip drivers Florian Fainelli
2021-10-20 18:48 ` Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 01/13] MIPS: BMIPS: Remove use of irq_cpu_offline Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 02/13] irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline() Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 03/13] irqchip/irq-bcm7038-l1: Use irq_get_irq_data() Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 04/13] irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` Florian Fainelli [this message]
2021-10-20 18:48   ` [PATCH v6 05/13] irqchip/irq-bcm7038-l1: Restrict affinity setting " Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 06/13] irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 07/13] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg Florian Fainelli
2021-10-20 18:48   ` [PATCH v6 07/13] genirq: Export irq_gc_{unmask_enable, mask_disable}_reg Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 08/13] irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 09/13] genirq: Export irq_gc_noop() Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 10/13] irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 11/13] arm64: broadcom: Removed forced select of interrupt controllers Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 12/13] ARM: bcm: " Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 18:48 ` [PATCH v6 13/13] irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE Florian Fainelli
2021-10-20 18:48   ` Florian Fainelli
2021-10-20 21:12   ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2021-10-20 21:13 ` [PATCH v6 00/13] Modular Broadcom irqchip drivers Marc Zyngier
2021-10-20 21:13   ` Marc Zyngier

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