From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-pci@vger.kernel.org, pali@kernel.org,
"Marek Behún" <kabel@kernel.org>
Subject: [PATCH v2 3/7] PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG
Date: Thu, 28 Oct 2021 20:56:55 +0200 [thread overview]
Message-ID: <20211028185659.20329-4-kabel@kernel.org> (raw)
In-Reply-To: <20211028185659.20329-1-kabel@kernel.org>
The PCIE_MSI_PAYLOAD_REG contains 16-bit MSI number, not only lower
8 bits. Fix reading content of this register and add a comment
describing the access to this register.
Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Cc: stable@vger.kernel.org
---
drivers/pci/controller/pci-aardvark.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index b45ff2911c80..389ebba1dd9b 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -119,6 +119,7 @@
#define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58)
#define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C)
#define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C)
+#define PCIE_MSI_DATA_MASK GENMASK(15, 0)
/* PCIe window configuration */
#define OB_WIN_BASE_ADDR 0x4c00
@@ -1319,8 +1320,12 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie)
if (!(BIT(msi_idx) & msi_status))
continue;
+ /*
+ * msi_idx contains bits [4:0] of the msi_data and msi_data
+ * contains 16bit MSI interrupt number
+ */
advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);
- msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF;
+ msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;
generic_handle_irq(msi_data);
}
--
2.32.0
next prev parent reply other threads:[~2021-10-28 18:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-28 18:56 [PATCH v2 0/7] PCI: aardvark controller fixes BATCH 2 Marek Behún
2021-10-28 18:56 ` [PATCH v2 1/7] PCI: pci-bridge-emul: Fix emulation of W1C bits Marek Behún
2021-10-28 18:56 ` [PATCH v2 2/7] PCI: aardvark: Fix return value of MSI domain .alloc() method Marek Behún
2021-10-28 18:56 ` Marek Behún [this message]
2021-10-28 18:56 ` [PATCH v2 4/7] PCI: aardvark: Fix support for bus mastering and PCI_COMMAND on emulated bridge Marek Behún
2021-10-28 18:56 ` [PATCH v2 5/7] PCI: aardvark: Set PCI Bridge Class Code to PCI Bridge Marek Behún
2021-10-28 18:56 ` [PATCH v2 6/7] PCI: aardvark: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge Marek Behún
2021-10-28 18:56 ` [PATCH v2 7/7] PCI: aardvark: Fix support for PCI_ROM_ADDRESS1 " Marek Behún
2021-10-29 9:27 ` [PATCH v2 0/7] PCI: aardvark controller fixes BATCH 2 Lorenzo Pieralisi
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