From: matheus.ferst@eldorado.org.br
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org,
groug@kaod.org, luis.pires@eldorado.org.br,
Matheus Ferst <matheus.ferst@eldorado.org.br>,
david@gibson.dropbear.id.au
Subject: [PATCH v3 00/25] PowerISA v3.1 instruction batch
Date: Thu, 4 Nov 2021 09:36:54 -0300 [thread overview]
Message-ID: <20211104123719.323713-1-matheus.ferst@eldorado.org.br> (raw)
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
This patch series implements 56 new instructions for POWER10, moving 28
"old" instructions to decodetree along the way. The series is divided by
facility as follows:
- From patch 1 to 9: Vector
- From patch 10 to 24: Vector-Scalar Extensions
- From patch 25: Fixed-Point
Based-on: ppc-for-6.2
Patches without review: 5, 25
v3:
- Rebase on ppc-for-6.2
- Fixed endianness issue in vector insert helpers
- cntlzdm/cnttzdm implementation without brcond
v2:
- do_ea_calc now allocate and returns ea
- Inline version of cntlzdm/cnttzdm
- vecop_list removed from GVecGen* without fniv
- vsldbi/vsrdbi implemented with tcg_gen_extract2_i64
- memcpy instead of misaligned load/stores on vector insert instructions
- Simplified helper for Vector Extract
- Fixed [p]stxv[xp]/[p]lxv[xp] to always access to lowest address first
in LE
- xxsplti32dx implemented with tcg_gen_st_i32
- valid_values mask removed from lxvkq implementation
Bruno Larsen (billionai) (6):
target/ppc: Introduce REQUIRE_VSX macro
target/ppc: moved XXSPLTW to using decodetree
target/ppc: moved XXSPLTIB to using decodetree
target/ppc: implemented XXSPLTI32DX
target/ppc: Implemented XXSPLTIW using decodetree
target/ppc: implemented XXSPLTIDP instruction
Lucas Mateus Castro (alqotel) (6):
target/ppc: moved stxv and lxv from legacy to decodtree
target/ppc: moved stxvx and lxvx from legacy to decodtree
target/ppc: added the instructions LXVP and STXVP
target/ppc: added the instructions LXVPX and STXVPX
target/ppc: added the instructions PLXV and PSTXV
target/ppc: added the instructions PLXVP and PSTXVP
Matheus Ferst (13):
target/ppc: Move vcfuged to vmx-impl.c.inc
target/ppc: Implement vclzdm/vctzdm instructions
target/ppc: Implement vpdepd/vpextd instruction
target/ppc: Implement vsldbi/vsrdbi instructions
target/ppc: Implement Vector Insert from GPR using GPR index insns
target/ppc: Implement Vector Insert Word from GPR using Immediate
insns
target/ppc: Implement Vector Insert from VSR using GPR index insns
target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree
target/ppc: Implement Vector Extract Double to VSR using GPR index
insns
target/ppc: receive high/low as argument in get/set_cpu_vsr
target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd
instructions
target/ppc: Implement lxvkq instruction
target/ppc: cntlzdm/cnttzdm implementation without brcond
target/ppc/helper.h | 20 +-
target/ppc/insn32.decode | 93 +++
target/ppc/insn64.decode | 57 ++
target/ppc/int_helper.c | 101 ++-
target/ppc/translate.c | 26 +-
target/ppc/translate/fixedpoint-impl.c.inc | 37 +-
target/ppc/translate/vector-impl.c.inc | 48 --
target/ppc/translate/vmx-impl.c.inc | 334 +++++++++-
target/ppc/translate/vmx-ops.c.inc | 10 +-
target/ppc/translate/vsx-impl.c.inc | 704 ++++++++++++---------
target/ppc/translate/vsx-ops.c.inc | 4 -
11 files changed, 1006 insertions(+), 428 deletions(-)
delete mode 100644 target/ppc/translate/vector-impl.c.inc
--
2.25.1
next reply other threads:[~2021-11-04 12:44 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-04 12:36 matheus.ferst [this message]
2021-11-04 12:36 ` [PATCH v3 01/25] target/ppc: Move vcfuged to vmx-impl.c.inc matheus.ferst
2021-11-04 12:36 ` [PATCH v3 02/25] target/ppc: Implement vclzdm/vctzdm instructions matheus.ferst
2021-11-04 12:36 ` [PATCH v3 03/25] target/ppc: Implement vpdepd/vpextd instruction matheus.ferst
2021-11-04 12:36 ` [PATCH v3 04/25] target/ppc: Implement vsldbi/vsrdbi instructions matheus.ferst
2021-11-04 12:36 ` [PATCH v3 05/25] target/ppc: Implement Vector Insert from GPR using GPR index insns matheus.ferst
2021-11-04 17:40 ` Richard Henderson
2021-11-04 12:37 ` [PATCH v3 06/25] target/ppc: Implement Vector Insert Word from GPR using Immediate insns matheus.ferst
2021-11-04 12:37 ` [PATCH v3 07/25] target/ppc: Implement Vector Insert from VSR using GPR index insns matheus.ferst
2021-11-04 12:37 ` [PATCH v3 08/25] target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 09/25] target/ppc: Implement Vector Extract Double to VSR using GPR index insns matheus.ferst
2021-11-04 12:37 ` [PATCH v3 10/25] target/ppc: Introduce REQUIRE_VSX macro matheus.ferst
2021-11-04 12:37 ` [PATCH v3 11/25] target/ppc: receive high/low as argument in get/set_cpu_vsr matheus.ferst
2021-11-04 12:37 ` [PATCH v3 12/25] target/ppc: moved stxv and lxv from legacy to decodtree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 13/25] target/ppc: moved stxvx and lxvx " matheus.ferst
2021-11-04 12:37 ` [PATCH v3 14/25] target/ppc: added the instructions LXVP and STXVP matheus.ferst
2021-11-04 12:37 ` [PATCH v3 15/25] target/ppc: added the instructions LXVPX and STXVPX matheus.ferst
2021-11-04 12:37 ` [PATCH v3 16/25] target/ppc: added the instructions PLXV and PSTXV matheus.ferst
2021-11-04 12:37 ` [PATCH v3 17/25] target/ppc: added the instructions PLXVP and PSTXVP matheus.ferst
2021-11-04 12:37 ` [PATCH v3 18/25] target/ppc: moved XXSPLTW to using decodetree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 19/25] target/ppc: moved XXSPLTIB " matheus.ferst
2021-11-04 12:37 ` [PATCH v3 20/25] target/ppc: implemented XXSPLTI32DX matheus.ferst
2021-11-04 12:37 ` [PATCH v3 21/25] target/ppc: Implemented XXSPLTIW using decodetree matheus.ferst
2021-11-04 12:37 ` [PATCH v3 22/25] target/ppc: implemented XXSPLTIDP instruction matheus.ferst
2021-11-04 12:37 ` [PATCH v3 23/25] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions matheus.ferst
2021-11-04 12:37 ` [PATCH v3 24/25] target/ppc: Implement lxvkq instruction matheus.ferst
2021-11-04 12:37 ` [PATCH v3 25/25] target/ppc: cntlzdm/cnttzdm implementation without brcond matheus.ferst
2021-11-04 17:41 ` Richard Henderson
2021-11-05 1:26 ` [PATCH v3 00/25] PowerISA v3.1 instruction batch David Gibson
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