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From: Lai Jiangshan <jiangshanlai@gmail.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: Lai Jiangshan <laijs@linux.alibaba.com>,
	Sean Christopherson <seanjc@google.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: [PATCH 05/15] KVM: VMX: Add and use X86_CR4_PDPTR_BITS when !enable_ept
Date: Mon,  8 Nov 2021 20:43:57 +0800	[thread overview]
Message-ID: <20211108124407.12187-6-jiangshanlai@gmail.com> (raw)
In-Reply-To: <20211108124407.12187-1-jiangshanlai@gmail.com>

From: Lai Jiangshan <laijs@linux.alibaba.com>

In set_cr4_guest_host_mask(), all cr4 pdptr bits are already set to be
intercepted in an unclear way.

Add X86_CR4_PDPTR_BITS to make it clear and self-documented.

No functionality changed.

Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
---
 arch/x86/kvm/kvm_cache_regs.h | 1 +
 arch/x86/kvm/vmx/vmx.c        | 4 +++-
 arch/x86/kvm/x86.c            | 4 +---
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
index 8fe036efa654..592f9eb9753b 100644
--- a/arch/x86/kvm/kvm_cache_regs.h
+++ b/arch/x86/kvm/kvm_cache_regs.h
@@ -10,6 +10,7 @@
 	 | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE)
 
 #define X86_CR4_TLB_BITS (X86_CR4_PGE | X86_CR4_PCIDE | X86_CR4_PAE | X86_CR4_SMEP)
+#define X86_CR4_PDPTR_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_SMEP)
 
 #define BUILD_KVM_GPR_ACCESSORS(lname, uname)				      \
 static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 1795702dc6de..d94e51e9c08f 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -4106,8 +4106,10 @@ void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
 
 	vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS &
 					  ~vcpu->arch.cr4_guest_rsvd_bits;
-	if (!enable_ept)
+	if (!enable_ept) {
 		vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_TLB_BITS;
+		vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PDPTR_BITS;
+	}
 	if (is_guest_mode(&vmx->vcpu))
 		vcpu->arch.cr4_guest_owned_bits &=
 			~get_vmcs12(vcpu)->cr4_guest_host_mask;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 034c233ea5a1..b92d4241b4d9 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1052,8 +1052,6 @@ EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 {
 	unsigned long old_cr4 = kvm_read_cr4(vcpu);
-	unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
-				   X86_CR4_SMEP;
 
 	if (!kvm_is_valid_cr4(vcpu, cr4))
 		return 1;
@@ -1064,7 +1062,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 		if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 			return 1;
 	} else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
-		   && ((cr4 ^ old_cr4) & pdptr_bits)
+		   && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
 		   && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 				   kvm_read_cr3(vcpu)))
 		return 1;
-- 
2.19.1.6.gb485710b


  parent reply	other threads:[~2021-11-08 12:44 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-08 12:43 [PATCH 00/15] KVM: X86: Fix and clean up for register caches Lai Jiangshan
2021-11-08 12:43 ` [PATCH 01/15] KVM: X86: Ensure the dirty PDPTEs to be loaded Lai Jiangshan
2021-11-08 12:43 ` [PATCH 02/15] KVM: VMX: Mark VCPU_EXREG_PDPTR available in ept_save_pdptrs() Lai Jiangshan
2021-11-08 12:43 ` [PATCH 03/15] KVM: SVM: Always clear available of VCPU_EXREG_PDPTR in svm_vcpu_run() Lai Jiangshan
2021-11-08 12:43 ` [PATCH 04/15] KVM: VMX: Add and use X86_CR4_TLB_BITS when !enable_ept Lai Jiangshan
2021-11-18 15:18   ` Paolo Bonzini
2021-11-08 12:43 ` Lai Jiangshan [this message]
2021-11-08 12:43 ` [PATCH 06/15] KVM: X86: Move CR0 pdptr_bits into header file as X86_CR0_PDPTR_BITS Lai Jiangshan
2021-11-08 12:43 ` [PATCH 07/15] KVM: SVM: Remove outdated comment in svm_load_mmu_pgd() Lai Jiangshan
2021-11-08 12:44 ` [PATCH 08/15] KVM: SVM: Remove useless check " Lai Jiangshan
2021-11-08 12:44 ` [PATCH 09/15] KVM: SVM: Remove the unneeded code to mark available for CR3 Lai Jiangshan
2021-11-18 15:17   ` Paolo Bonzini
2021-11-08 12:44 ` [PATCH 10/15] KVM: X86: Mark CR3 dirty when vcpu->arch.cr3 is changed Lai Jiangshan
2021-11-08 12:44 ` [PATCH 11/15] KVM: VMX: Update vmcs.GUEST_CR3 only when the guest CR3 is dirty Lai Jiangshan
2021-12-15 15:47   ` Maxim Levitsky
2021-12-15 16:31     ` Lai Jiangshan
2021-12-15 16:43       ` Lai Jiangshan
2021-12-15 16:45       ` Sean Christopherson
2021-12-15 17:10         ` Paolo Bonzini
2021-12-15 20:21         ` Maxim Levitsky
2021-12-15 20:20       ` Maxim Levitsky
2021-11-08 12:44 ` [PATCH 12/15] KVM: VMX: Reset the bits that are meaningful to be reset in vmx_register_cache_reset() Lai Jiangshan
2021-11-18 15:25   ` Paolo Bonzini
2021-11-08 12:44 ` [PATCH 13/15] KVM: SVM: Add and use svm_register_cache_reset() Lai Jiangshan
2021-11-18 15:37   ` Paolo Bonzini
2021-11-18 16:28     ` Lai Jiangshan
2021-11-18 17:54       ` Paolo Bonzini
2021-11-19  0:49         ` Lai Jiangshan
2021-11-08 12:44 ` [PATCH 14/15] KVM: X86: Remove kvm_register_clear_available() Lai Jiangshan
2021-11-08 12:44 ` [PATCH 15/15] KVM: nVMX: Always write vmcs.GUEST_CR3 during nested VM-Exit Lai Jiangshan
2021-11-18 15:52   ` Paolo Bonzini
2021-11-11 14:45 ` [PATCH 16/15] KVM: X86: Update mmu->pdptrs only when it is changed Lai Jiangshan
2021-12-07 23:43   ` Sean Christopherson
2021-12-08  3:29     ` Lai Jiangshan
2021-12-08  9:09     ` Paolo Bonzini
2021-12-08  9:34       ` Lai Jiangshan
2021-11-11 14:46 ` [PATCH 17/15] KVM: X86: Ensure pae_root to be reconstructed for shadow paging if the guest PDPTEs " Lai Jiangshan
2021-11-23  9:34   ` Lai Jiangshan
2021-12-08  0:15   ` Sean Christopherson
2021-12-08  4:00     ` Lai Jiangshan
2021-12-08 15:29       ` Sean Christopherson
2021-12-09 22:46     ` Paolo Bonzini
2021-12-10 21:07       ` Sean Christopherson
2021-12-10 21:08         ` Sean Christopherson
2021-12-11  6:56         ` Maxim Levitsky
2021-12-11  8:22           ` Paolo Bonzini
2021-12-13 16:54             ` Sean Christopherson
2021-11-18  8:53 ` [PATCH 00/15] KVM: X86: Fix and clean up for register caches Lai Jiangshan

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