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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, clg@kaod.org, danielhb413@gmail.com,
	groug@kaod.org
Cc: Matheus Ferst <matheus.ferst@eldorado.org.br>,
	Richard Henderson <richard.henderson@linaro.org>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [PULL 09/54] target/ppc: Implement pdepd instruction
Date: Tue,  9 Nov 2021 16:51:19 +1100	[thread overview]
Message-ID: <20211109055204.230765-10-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20211109055204.230765-1-david@gibson.dropbear.id.au>

From: Matheus Ferst <matheus.ferst@eldorado.org.br>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211029202424.175401-10-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target/ppc/helper.h                        |  1 +
 target/ppc/insn32.decode                   |  1 +
 target/ppc/int_helper.c                    | 20 ++++++++++++++++++++
 target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++
 4 files changed, 34 insertions(+)

diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 4076aa281e..3e22957559 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 DEF_HELPER_3(sraw, tl, env, tl, tl)
 DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64)
 #if defined(TARGET_PPC64)
+DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
 DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl)
 DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
 DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index ee8c90d520..c47a6a02e1 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -126,6 +126,7 @@ ADDPCIS         010011 ..... ..... .......... 00010 .   @DX
 CFUGED          011111 ..... ..... ..... 0011011100 -   @X
 CNTLZDM         011111 ..... ..... ..... 0000111011 -   @X
 CNTTZDM         011111 ..... ..... ..... 1000111011 -   @X
+PDEPD           011111 ..... ..... ..... 0010011100 -   @X
 
 ### Float-Point Load Instructions
 
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index eeb7781a9e..337bb7f4d3 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -386,6 +386,26 @@ uint64_t helper_cfuged(uint64_t src, uint64_t mask)
     return left | (right >> n);
 }
 
+#if defined(TARGET_PPC64)
+uint64_t helper_PDEPD(uint64_t src, uint64_t mask)
+{
+    int i, o;
+    uint64_t result = 0;
+
+    if (mask == -1) {
+        return src;
+    }
+
+    for (i = 0; mask != 0; i++) {
+        o = ctz64(mask);
+        mask &= mask - 1;
+        result |= ((src >> i) & 1) << o;
+    }
+
+    return result;
+}
+#endif
+
 /*****************************************************************************/
 /* PowerPC 601 specific instructions (POWER bridge) */
 target_ulong helper_div(CPUPPCState *env, target_ulong arg1, target_ulong arg2)
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
index d3dc0a474e..f0bf69fbac 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -469,3 +469,15 @@ static bool trans_CNTTZDM(DisasContext *ctx, arg_X *a)
 #endif
     return true;
 }
+
+static bool trans_PDEPD(DisasContext *ctx, arg_X *a)
+{
+    REQUIRE_64BIT(ctx);
+    REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+#if defined(TARGET_PPC64)
+    gen_helper_PDEPD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
+#else
+    qemu_build_not_reached();
+#endif
+    return true;
+}
-- 
2.33.1



  parent reply	other threads:[~2021-11-09  6:02 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-09  5:51 [PULL 00/54] ppc-for-6.2 queue 20211109 David Gibson
2021-11-09  5:51 ` [PULL 01/54] target/ppc: introduce do_ea_calc David Gibson
2021-11-09  5:51 ` [PULL 02/54] target/ppc: move resolve_PLS_D to translate.c David Gibson
2021-11-09  5:51 ` [PULL 03/54] target/ppc: Move load and store floating point instructions to decodetree David Gibson
2021-11-10 16:33   ` Laurent Vivier
2021-11-10 16:56     ` Cédric Le Goater
2021-11-10 17:04       ` Laurent Vivier
2021-11-12 13:39         ` Cédric Le Goater
2021-11-09  5:51 ` [PULL 04/54] target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions David Gibson
2021-11-09  5:51 ` [PULL 05/54] target/ppc: Move LQ and STQ to decodetree David Gibson
2021-11-09  5:51 ` [PULL 06/54] target/ppc: Implement PLQ and PSTQ David Gibson
2021-11-09  5:51 ` [PULL 07/54] target/ppc: Implement cntlzdm David Gibson
2021-11-09  5:51 ` [PULL 08/54] target/ppc: Implement cnttzdm David Gibson
2021-11-09  5:51 ` David Gibson [this message]
2021-11-09  5:51 ` [PULL 10/54] target/ppc: Implement pextd instruction David Gibson
2021-11-09  5:51 ` [PULL 11/54] libdecnumber: introduce decNumberFrom[U]Int128 David Gibson
2021-11-09  5:51 ` [PULL 12/54] target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c David Gibson
2021-11-09  5:51 ` [PULL 13/54] target/ppc: Introduce REQUIRE_FPU David Gibson
2021-11-09  5:51 ` [PULL 14/54] target/ppc: Implement DCFFIXQQ David Gibson
2021-11-09  5:51 ` [PULL 15/54] host-utils: Introduce mulu128 David Gibson
2021-11-09  5:51 ` [PULL 16/54] libdecnumber: Introduce decNumberIntegralToInt128 David Gibson
2021-11-09  5:51 ` [PULL 17/54] target/ppc: Implement DCTFIXQQ David Gibson
2021-11-09  5:51 ` [PULL 18/54] target/ppc: Do not update nip on DFP instructions David Gibson
2021-11-09  5:51 ` [PULL 19/54] target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree David Gibson
2021-11-09  5:51 ` [PULL 20/54] target/ppc: Move d{add, sub, mul, div, iex}[q] " David Gibson
2021-11-09  5:51 ` [PULL 21/54] target/ppc: Move dcmp{u, o}[q], dts{tex, tsf, tsfi}[q] " David Gibson
2021-11-09  5:51 ` [PULL 22/54] target/ppc: Move dquai[q], drint{x,n}[q] " David Gibson
2021-11-09  5:51 ` [PULL 23/54] target/ppc: Move dqua[q], drrnd[q] " David Gibson
2021-11-09  5:51 ` [PULL 24/54] target/ppc: Move dct{dp, qpq}, dr{sp, dpq}, dc{f, t}fix[q], dxex[q] " David Gibson
2021-11-09  5:51 ` [PULL 25/54] target/ppc: Move ddedpd[q], denbcd[q], dscli[q], dscri[q] " David Gibson
2021-11-09  5:51 ` [PULL 26/54] ppc/pnv: Fix check on block device before updating drive contents David Gibson
2021-11-09  5:51 ` [PULL 27/54] ppc/pegasos2: Suppress warning when qtest enabled David Gibson
2021-11-09  5:51 ` [PULL 28/54] target/ppc: Move vcfuged to vmx-impl.c.inc David Gibson
2021-11-09  5:51 ` [PULL 29/54] target/ppc: Implement vclzdm/vctzdm instructions David Gibson
2021-11-09  5:51 ` [PULL 30/54] target/ppc: Implement vpdepd/vpextd instruction David Gibson
2021-11-09  5:51 ` [PULL 31/54] target/ppc: Implement vsldbi/vsrdbi instructions David Gibson
2021-11-09  5:51 ` [PULL 32/54] target/ppc: Implement Vector Insert from GPR using GPR index insns David Gibson
2021-11-09  5:51 ` [PULL 33/54] target/ppc: Implement Vector Insert Word from GPR using Immediate insns David Gibson
2021-11-09  5:51 ` [PULL 34/54] target/ppc: Implement Vector Insert from VSR using GPR index insns David Gibson
2021-11-09  5:51 ` [PULL 35/54] target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree David Gibson
2021-11-09  5:51 ` [PULL 36/54] target/ppc: Implement Vector Extract Double to VSR using GPR index insns David Gibson
2021-11-09  5:51 ` [PULL 37/54] target/ppc: Introduce REQUIRE_VSX macro David Gibson
2021-11-09  5:51 ` [PULL 38/54] target/ppc: receive high/low as argument in get/set_cpu_vsr David Gibson
2021-11-09  5:51 ` [PULL 39/54] target/ppc: moved stxv and lxv from legacy to decodtree David Gibson
2021-11-09  5:51 ` [PULL 40/54] target/ppc: moved stxvx and lxvx " David Gibson
2021-11-09  5:51 ` [PULL 41/54] target/ppc: added the instructions LXVP and STXVP David Gibson
2021-11-09  5:51 ` [PULL 42/54] target/ppc: added the instructions LXVPX and STXVPX David Gibson
2021-11-09  5:51 ` [PULL 43/54] target/ppc: added the instructions PLXV and PSTXV David Gibson
2021-11-09  5:51 ` [PULL 44/54] target/ppc: added the instructions PLXVP and PSTXVP David Gibson
2021-11-09  5:51 ` [PULL 45/54] target/ppc: moved XXSPLTW to using decodetree David Gibson
2021-11-09  5:51 ` [PULL 46/54] target/ppc: moved XXSPLTIB " David Gibson
2021-11-09  5:51 ` [PULL 47/54] target/ppc: implemented XXSPLTI32DX David Gibson
2021-11-09  5:51 ` [PULL 48/54] target/ppc: Implemented XXSPLTIW using decodetree David Gibson
2021-11-09  5:51 ` [PULL 49/54] target/ppc: implemented XXSPLTIDP instruction David Gibson
2021-11-09  5:52 ` [PULL 50/54] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions David Gibson
2021-11-09  5:52 ` [PULL 51/54] target/ppc: Implement lxvkq instruction David Gibson
2021-11-09  5:52 ` [PULL 52/54] target/ppc: cntlzdm/cnttzdm implementation without brcond David Gibson
2021-11-09  5:52 ` [PULL 53/54] target/ppc, hw/ppc: Change maintainers David Gibson
2021-11-09  5:52 ` [PULL 54/54] spapr_numa.c: FORM2 table handle nodes with no distance info David Gibson
2021-11-09  8:41 ` [PULL 00/54] ppc-for-6.2 queue 20211109 Richard Henderson

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