From: Biju Das <biju.das.jz@bp.renesas.com>
To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Wolfram Sang <wsa+renesas@sang-engineering.com>,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
linux-renesas-soc@vger.kernel.org
Subject: [PATCH 0/2] Rename RZ/G2L SDHI clocks
Date: Mon, 22 Nov 2021 10:39:03 +0000 [thread overview]
Message-ID: <20211122103905.14439-1-biju.das.jz@bp.renesas.com> (raw)
RZ/G2L SDHI has 4 clocks which is controlled by PM frame work and is using
Gen3 compatible string. Now the clock factorisation happened on highspeed
clock handling and it changes to fallback by getting parent clock, if
"clkh" is not specified in device tree.
This path series rename the clocks to match with the clock names used in
R-Car Gen2 and later generations. This will avoid driver changes related
to clock names.
This patch series based on renesas-devel
Biju Das (2):
dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
arm64: dts: renesas: r9a07g044: Rename SDHI clocks
.../devicetree/bindings/mmc/renesas,sdhi.yaml | 10 +++++-----
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 8 ++++----
2 files changed, 9 insertions(+), 9 deletions(-)
--
2.17.1
next reply other threads:[~2021-11-22 10:39 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-22 10:39 Biju Das [this message]
2021-11-22 10:39 ` [PATCH 1/2] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks Biju Das
2021-11-22 10:46 ` Wolfram Sang
2021-11-23 13:38 ` Geert Uytterhoeven
2021-11-23 16:16 ` Ulf Hansson
2021-11-22 10:39 ` [PATCH 2/2] arm64: dts: renesas: r9a07g044: Rename SDHI clocks Biju Das
2021-11-23 13:40 ` Geert Uytterhoeven
2021-11-22 11:27 ` [PATCH 0/2] Rename RZ/G2L " Ulf Hansson
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