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From: "Pali Rohár" <pali@kernel.org>
To: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Marek Behún" <kabel@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 6/6] PCI: pci-bridge-emul: Set PCI_STATUS_CAP_LIST for PCIe device
Date: Wed, 24 Nov 2021 16:59:44 +0100	[thread overview]
Message-ID: <20211124155944.1290-7-pali@kernel.org> (raw)
In-Reply-To: <20211124155944.1290-1-pali@kernel.org>

Since all PCI Express device Functions are required to implement the PCI
Express Capability structure, Capabilities List bit in PCI Status Register
must be hardwired to 1b. Capabilities Pointer register (which is already
set by pci-bride-emul.c driver) is valid only when Capabilities List is set
to 1b.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Cc: stable@vger.kernel.org
---
 drivers/pci/pci-bridge-emul.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 6c75dc296984..d11633999df5 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -339,6 +339,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
 
 	if (bridge->has_pcie) {
 		bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
+		bridge->conf.status |= cpu_to_le16(PCI_STATUS_CAP_LIST);
 		bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
 		bridge->pcie_conf.cap |= cpu_to_le16(PCI_EXP_TYPE_ROOT_PORT << 4);
 		bridge->pcie_cap_regs_behavior =
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org>
To: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Marek Behún" <kabel@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 6/6] PCI: pci-bridge-emul: Set PCI_STATUS_CAP_LIST for PCIe device
Date: Wed, 24 Nov 2021 16:59:44 +0100	[thread overview]
Message-ID: <20211124155944.1290-7-pali@kernel.org> (raw)
In-Reply-To: <20211124155944.1290-1-pali@kernel.org>

Since all PCI Express device Functions are required to implement the PCI
Express Capability structure, Capabilities List bit in PCI Status Register
must be hardwired to 1b. Capabilities Pointer register (which is already
set by pci-bride-emul.c driver) is valid only when Capabilities List is set
to 1b.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Cc: stable@vger.kernel.org
---
 drivers/pci/pci-bridge-emul.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 6c75dc296984..d11633999df5 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -339,6 +339,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
 
 	if (bridge->has_pcie) {
 		bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
+		bridge->conf.status |= cpu_to_le16(PCI_STATUS_CAP_LIST);
 		bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
 		bridge->pcie_conf.cap |= cpu_to_le16(PCI_EXP_TYPE_ROOT_PORT << 4);
 		bridge->pcie_cap_regs_behavior =
-- 
2.20.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-11-24 16:00 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-24 15:59 [PATCH 0/6] PCI: pci-bridge-emul: Various fixes Pali Rohár
2021-11-24 15:59 ` Pali Rohár
2021-11-24 15:59 ` [PATCH 1/6] PCI: pci-bridge-emul: Make expansion ROM Base Address register read-only Pali Rohár
2021-11-24 15:59   ` Pali Rohár
2021-11-24 15:59 ` [PATCH 2/6] PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space Pali Rohár
2021-11-24 15:59   ` Pali Rohár
2021-11-24 15:59 ` [PATCH 3/6] PCI: pci-bridge-emul: Add definitions for missing capabilities registers Pali Rohár
2021-11-24 15:59   ` Pali Rohár
2021-11-24 15:59 ` [PATCH 4/6] PCI: pci-bridge-emul: Fix definitions of reserved bits Pali Rohár
2021-11-24 15:59   ` Pali Rohár
2021-11-24 15:59 ` [PATCH 5/6] PCI: pci-bridge-emul: Correctly set PCIe capabilities Pali Rohár
2021-11-24 15:59   ` Pali Rohár
2021-11-24 15:59 ` Pali Rohár [this message]
2021-11-24 15:59   ` [PATCH 6/6] PCI: pci-bridge-emul: Set PCI_STATUS_CAP_LIST for PCIe device Pali Rohár
2021-11-30 13:26 ` [PATCH 0/6] PCI: pci-bridge-emul: Various fixes Marek Behún
2021-11-30 13:26   ` Marek Behún
2021-12-02 20:20   ` Pali Rohár
2021-12-02 20:20     ` Pali Rohár
2021-12-06 12:19 ` Lorenzo Pieralisi
2021-12-06 12:19   ` Lorenzo Pieralisi
2021-12-06 12:24   ` Pali Rohár
2021-12-06 12:24     ` Pali Rohár
2021-12-06 14:26     ` Lorenzo Pieralisi
2021-12-06 14:26       ` Lorenzo Pieralisi

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