From: Geert Uytterhoeven <geert@linux-m68k.org> To: Rob Herring <robh+dt@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Damien Le Moal <damien.lemoal@wdc.com>, Lewis Hanly <lewis.hanly@microchip.com>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Conor Dooley <conor.dooley@microchip.com> Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Geert Uytterhoeven <geert@linux-m68k.org> Subject: [PATCH 5/9] riscv: dts: microchip: mpfs: Fix PLIC node Date: Thu, 25 Nov 2021 16:31:27 +0100 [thread overview] Message-ID: <20211125153131.163533-6-geert@linux-m68k.org> (raw) In-Reply-To: <20211125153131.163533-1-geert@linux-m68k.org> Fix the device node for the Platform-Level Interrupt Controller (PLIC): - Add missing "#address-cells" property, - Sort properties according to DT bindings. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> --- arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index d91226bfa586cda7..c71d2d682fc0a0e7 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -168,16 +168,17 @@ clint@2000000 { }; plic: interrupt-controller@c000000 { - #interrupt-cells = <1>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,ndev = <186>; + #address-cells = <0>; + #interrupt-cells = <1>; interrupt-controller; interrupts-extended = <&cpu0_intc 11>, <&cpu1_intc 11>, <&cpu1_intc 9>, <&cpu2_intc 11>, <&cpu2_intc 9>, <&cpu3_intc 11>, <&cpu3_intc 9>, <&cpu4_intc 11>, <&cpu4_intc 9>; + riscv,ndev = <186>; }; dma@3000000 { -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org> To: Rob Herring <robh+dt@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Damien Le Moal <damien.lemoal@wdc.com>, Lewis Hanly <lewis.hanly@microchip.com>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Conor Dooley <conor.dooley@microchip.com> Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Geert Uytterhoeven <geert@linux-m68k.org> Subject: [PATCH 5/9] riscv: dts: microchip: mpfs: Fix PLIC node Date: Thu, 25 Nov 2021 16:31:27 +0100 [thread overview] Message-ID: <20211125153131.163533-6-geert@linux-m68k.org> (raw) In-Reply-To: <20211125153131.163533-1-geert@linux-m68k.org> Fix the device node for the Platform-Level Interrupt Controller (PLIC): - Add missing "#address-cells" property, - Sort properties according to DT bindings. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> --- arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index d91226bfa586cda7..c71d2d682fc0a0e7 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -168,16 +168,17 @@ clint@2000000 { }; plic: interrupt-controller@c000000 { - #interrupt-cells = <1>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,ndev = <186>; + #address-cells = <0>; + #interrupt-cells = <1>; interrupt-controller; interrupts-extended = <&cpu0_intc 11>, <&cpu1_intc 11>, <&cpu1_intc 9>, <&cpu2_intc 11>, <&cpu2_intc 9>, <&cpu3_intc 11>, <&cpu3_intc 9>, <&cpu4_intc 11>, <&cpu4_intc 9>; + riscv,ndev = <186>; }; dma@3000000 { -- 2.25.1
next prev parent reply other threads:[~2021-11-25 15:32 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-11-25 15:31 [PATCH 0/9] riscv: dts: Miscellaneous fixes Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-25 15:31 ` [PATCH 1/9] riscv: dts: canaan: Fix SPI FLASH node names Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 4:41 ` Damien Le Moal 2021-11-26 4:41 ` Damien Le Moal 2021-11-26 9:54 ` Krzysztof Kozlowski 2021-11-26 9:54 ` Krzysztof Kozlowski 2021-11-25 15:31 ` [PATCH 2/9] riscv: dts: canaan: Group tuples in interrupt properties Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 4:42 ` Damien Le Moal 2021-11-26 4:42 ` Damien Le Moal 2021-11-26 9:53 ` Krzysztof Kozlowski 2021-11-26 9:53 ` Krzysztof Kozlowski 2021-11-25 15:31 ` [PATCH 3/9] riscv: dts: microchip: mpfs: Drop empty chosen node Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 9:53 ` Krzysztof Kozlowski 2021-11-26 9:53 ` Krzysztof Kozlowski 2021-11-26 9:57 ` Geert Uytterhoeven 2021-11-26 9:57 ` Geert Uytterhoeven 2021-11-26 11:45 ` Conor.Dooley 2021-11-26 11:45 ` Conor.Dooley 2021-11-25 15:31 ` [PATCH 4/9] riscv: dts: microchip: Group tuples in interrupt properties Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 8:42 ` Conor.Dooley 2021-11-26 8:42 ` Conor.Dooley 2021-12-03 14:38 ` Geert Uytterhoeven 2021-12-03 14:38 ` Geert Uytterhoeven 2021-12-03 15:17 ` Conor.Dooley 2021-12-03 15:17 ` Conor.Dooley 2021-11-26 9:52 ` Krzysztof Kozlowski 2021-11-26 9:52 ` Krzysztof Kozlowski 2021-11-25 15:31 ` Geert Uytterhoeven [this message] 2021-11-25 15:31 ` [PATCH 5/9] riscv: dts: microchip: mpfs: Fix PLIC node Geert Uytterhoeven 2021-11-26 9:49 ` Krzysztof Kozlowski 2021-11-26 9:49 ` Krzysztof Kozlowski 2021-11-26 11:49 ` Conor.Dooley 2021-11-26 11:49 ` Conor.Dooley 2021-11-25 15:31 ` [PATCH 6/9] riscv: dts: microchip: mpfs: Fix reference clock node Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 9:48 ` Krzysztof Kozlowski 2021-11-26 9:48 ` Krzysztof Kozlowski 2021-11-26 10:14 ` Conor.Dooley 2021-11-26 10:14 ` Conor.Dooley 2021-11-26 10:47 ` Conor.Dooley 2021-11-26 10:47 ` Conor.Dooley 2021-12-03 15:29 ` Conor.Dooley 2021-12-03 15:29 ` Conor.Dooley 2021-12-03 15:42 ` Krzysztof Kozlowski 2021-12-03 15:42 ` Krzysztof Kozlowski 2021-12-03 15:49 ` Geert Uytterhoeven 2021-12-03 15:49 ` Geert Uytterhoeven 2021-11-25 15:31 ` [PATCH 7/9] riscv: dts: sifive: Group tuples in register properties Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 9:46 ` Krzysztof Kozlowski 2021-11-26 9:46 ` Krzysztof Kozlowski 2021-11-25 15:31 ` [PATCH 8/9] riscv: dts: sifive: Group tuples in interrupt properties Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 9:46 ` Krzysztof Kozlowski 2021-11-26 9:46 ` Krzysztof Kozlowski 2021-11-25 15:31 ` [PATCH 9/9] riscv: dts: sifive: fu540-c000: Drop bogus soc node compatible values Geert Uytterhoeven 2021-11-25 15:31 ` Geert Uytterhoeven 2021-11-26 9:46 ` Krzysztof Kozlowski 2021-11-26 9:46 ` Krzysztof Kozlowski
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