From: Miquel Raynal <miquel.raynal@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>, <devicetree@vger.kernel.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Xiangsheng Hou <Xiangsheng.Hou@mediatek.com>, Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Boris Brezillon <boris.brezillon@collabora.com>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v3 20/22] spi: mxic: Create a helper to ease the start of an operation Date: Tue, 7 Dec 2021 10:34:20 +0100 [thread overview] Message-ID: <20211207093422.166934-21-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20211207093422.166934-1-miquel.raynal@bootlin.com> Create the mxic_spi_mem_prep_op_cfg() helper to provide the content to write to the register controlling the next IO command. This helper will soon be used by the dirmap implementation and having this code factorized out earlier will clarify this addition. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-mxic.c | 53 +++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index 068543c40ce7..3c4e64cbe812 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -296,6 +296,33 @@ static u32 mxic_spi_prep_hc_cfg(struct spi_device *spi, u32 flags) HC_CFG_SLV_ACT(spi->chip_select) | HC_CFG_IDLE_SIO_LVL(1); } +static u32 mxic_spi_mem_prep_op_cfg(const struct spi_mem_op *op) +{ + u32 cfg = OP_CMD_BYTES(op->cmd.nbytes) | + OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | + (op->cmd.dtr ? OP_CMD_DDR : 0); + + if (op->addr.nbytes) + cfg |= OP_ADDR_BYTES(op->addr.nbytes) | + OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | + (op->addr.dtr ? OP_ADDR_DDR : 0); + + if (op->dummy.nbytes) + cfg |= OP_DUMMY_CYC(op->dummy.nbytes); + + if (op->data.nbytes) { + cfg |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | + (op->data.dtr ? OP_DATA_DDR : 0); + if (op->data.dir == SPI_MEM_DATA_IN) { + cfg |= OP_READ; + if (op->data.dtr) + cfg |= OP_DQS_EN; + } + } + + return cfg; +} + static int mxic_spi_data_xfer(struct mxic_spi *mxic, const void *txbuf, void *rxbuf, unsigned int len) { @@ -374,7 +401,6 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, { struct mxic_spi *mxic = spi_master_get_devdata(mem->spi->master); int i, ret; - u32 ss_ctrl; u8 addr[8], cmd[2]; ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz); @@ -386,29 +412,8 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, writel(HC_EN_BIT, mxic->regs + HC_EN); - ss_ctrl = OP_CMD_BYTES(op->cmd.nbytes) | - OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | - (op->cmd.dtr ? OP_CMD_DDR : 0); - - if (op->addr.nbytes) - ss_ctrl |= OP_ADDR_BYTES(op->addr.nbytes) | - OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | - (op->addr.dtr ? OP_ADDR_DDR : 0); - - if (op->dummy.nbytes) - ss_ctrl |= OP_DUMMY_CYC(op->dummy.nbytes); - - if (op->data.nbytes) { - ss_ctrl |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | - (op->data.dtr ? OP_DATA_DDR : 0); - if (op->data.dir == SPI_MEM_DATA_IN) { - ss_ctrl |= OP_READ; - if (op->data.dtr) - ss_ctrl |= OP_DQS_EN; - } - } - - writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select)); + writel(mxic_spi_mem_prep_op_cfg(op), + mxic->regs + SS_CTRL(mem->spi->chip_select)); writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT, mxic->regs + HC_CFG); -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>, <devicetree@vger.kernel.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Xiangsheng Hou <Xiangsheng.Hou@mediatek.com>, Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Boris Brezillon <boris.brezillon@collabora.com>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v3 20/22] spi: mxic: Create a helper to ease the start of an operation Date: Tue, 7 Dec 2021 10:34:20 +0100 [thread overview] Message-ID: <20211207093422.166934-21-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20211207093422.166934-1-miquel.raynal@bootlin.com> Create the mxic_spi_mem_prep_op_cfg() helper to provide the content to write to the register controlling the next IO command. This helper will soon be used by the dirmap implementation and having this code factorized out earlier will clarify this addition. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-mxic.c | 53 +++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index 068543c40ce7..3c4e64cbe812 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -296,6 +296,33 @@ static u32 mxic_spi_prep_hc_cfg(struct spi_device *spi, u32 flags) HC_CFG_SLV_ACT(spi->chip_select) | HC_CFG_IDLE_SIO_LVL(1); } +static u32 mxic_spi_mem_prep_op_cfg(const struct spi_mem_op *op) +{ + u32 cfg = OP_CMD_BYTES(op->cmd.nbytes) | + OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | + (op->cmd.dtr ? OP_CMD_DDR : 0); + + if (op->addr.nbytes) + cfg |= OP_ADDR_BYTES(op->addr.nbytes) | + OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | + (op->addr.dtr ? OP_ADDR_DDR : 0); + + if (op->dummy.nbytes) + cfg |= OP_DUMMY_CYC(op->dummy.nbytes); + + if (op->data.nbytes) { + cfg |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | + (op->data.dtr ? OP_DATA_DDR : 0); + if (op->data.dir == SPI_MEM_DATA_IN) { + cfg |= OP_READ; + if (op->data.dtr) + cfg |= OP_DQS_EN; + } + } + + return cfg; +} + static int mxic_spi_data_xfer(struct mxic_spi *mxic, const void *txbuf, void *rxbuf, unsigned int len) { @@ -374,7 +401,6 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, { struct mxic_spi *mxic = spi_master_get_devdata(mem->spi->master); int i, ret; - u32 ss_ctrl; u8 addr[8], cmd[2]; ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz); @@ -386,29 +412,8 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, writel(HC_EN_BIT, mxic->regs + HC_EN); - ss_ctrl = OP_CMD_BYTES(op->cmd.nbytes) | - OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | - (op->cmd.dtr ? OP_CMD_DDR : 0); - - if (op->addr.nbytes) - ss_ctrl |= OP_ADDR_BYTES(op->addr.nbytes) | - OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | - (op->addr.dtr ? OP_ADDR_DDR : 0); - - if (op->dummy.nbytes) - ss_ctrl |= OP_DUMMY_CYC(op->dummy.nbytes); - - if (op->data.nbytes) { - ss_ctrl |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | - (op->data.dtr ? OP_DATA_DDR : 0); - if (op->data.dir == SPI_MEM_DATA_IN) { - ss_ctrl |= OP_READ; - if (op->data.dtr) - ss_ctrl |= OP_DQS_EN; - } - } - - writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select)); + writel(mxic_spi_mem_prep_op_cfg(op), + mxic->regs + SS_CTRL(mem->spi->chip_select)); writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT, mxic->regs + HC_CFG); -- 2.27.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2021-12-07 9:35 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-07 9:34 [PATCH v3 00/22] External ECC engines & Macronix support Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 01/22] dt-bindings: mtd: nand-controller: Fix the reg property description Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 02/22] dt-bindings: mtd: nand-controller: Fix a comment in the examples Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 03/22] dt-bindings: mtd: nand-controller: Harmonize the property types Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-14 17:45 ` Rob Herring 2021-12-14 17:45 ` Rob Herring 2021-12-15 15:50 ` Miquel Raynal 2021-12-15 15:50 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 04/22] dt-bindings: mtd: nand-chip: Create a NAND chip description Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 05/22] dt-bindings: mtd: spi-nand: Convert spi-nand description file to yaml Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 06/22] dt-bindings: vendor-prefixes: Clarify Macronix prefix Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 07/22] dt-bindings: spi: mxic: The interrupt property is not mandatory Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 08/22] dt-bindings: spi: mxic: Convert to yaml Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 09/22] dt-bindings: spi: mxic: Document the nand-ecc-engine property Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 10/22] dt-bindings: mtd: Describe Macronix NAND ECC engine Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 11/22] mtd: spinand: macronix: Use random program load Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 12/22] mtd: nand: ecc: Add infrastructure to support hardware engines Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 13/22] mtd: nand: Add a new helper to retrieve the ECC context Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 14/22] mtd: nand: mxic-ecc: Add Macronix external ECC engine support Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 15/22] mtd: nand: mxic-ecc: Support SPI pipelined mode Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 16/22] mtd: spinand: Delay a little bit dirmap creation Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 17/22] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:46 ` Boris Brezillon 2021-12-07 9:46 ` Boris Brezillon 2021-12-07 10:53 ` Miquel Raynal 2021-12-07 10:53 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 18/22] spi: mxic: Fix the transmit path Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 19/22] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal [this message] 2021-12-07 9:34 ` [PATCH v3 20/22] spi: mxic: Create a helper to ease the start of " Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 21/22] spi: mxic: Add support for direct mapping Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal 2021-12-07 9:34 ` [PATCH v3 22/22] spi: mxic: Add support for pipelined ECC operations Miquel Raynal 2021-12-07 9:34 ` Miquel Raynal
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