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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	<linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>,
	<linux-spi@vger.kernel.org>
Cc: Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Xiangsheng Hou <xiangsheng.hou@mediatek.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v9 06/13] spi: spi-mem: Add an ecc parameter to the spi_mem_op structure
Date: Tue,  4 Jan 2022 09:36:24 +0100	[thread overview]
Message-ID: <20220104083631.40776-7-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20220104083631.40776-1-miquel.raynal@bootlin.com>

Soon the SPI-NAND core will need a way to request a SPI controller to
enable ECC support for a given operation. This is because of the
pipelined integration of certain ECC engines, which are directly managed
by the SPI controller itself.

Introduce a spi_mem_op additional field for this purpose: ecc.

So far this field is left unset and checked to be false by all
the SPI controller drivers in their ->supports_op() hook, as they all
call spi_mem_default_supports_op().

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/spi/spi-mem.c       | 5 +++++
 include/linux/spi/spi-mem.h | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index ed966d8129eb..f38ac31961c9 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -178,6 +178,11 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
 			return false;
 	}
 
+	if (op->data.ecc) {
+		if (!spi_mem_controller_is_capable(ctlr, ecc))
+			return false;
+	}
+
 	return spi_mem_check_buswidth(mem, op);
 }
 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 4a1bfe689872..051050b40309 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -89,6 +89,7 @@ enum spi_mem_data_dir {
  * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
  * @data.buswidth: number of IO lanes used to send/receive the data
  * @data.dtr: whether the data should be sent in DTR mode or not
+ * @data.ecc: whether error correction is required or not
  * @data.dir: direction of the transfer
  * @data.nbytes: number of data bytes to send/receive. Can be zero if the
  *		 operation does not involve transferring data
@@ -119,6 +120,7 @@ struct spi_mem_op {
 	struct {
 		u8 buswidth;
 		u8 dtr : 1;
+		u8 ecc : 1;
 		enum spi_mem_data_dir dir;
 		unsigned int nbytes;
 		union {
@@ -126,6 +128,7 @@ struct spi_mem_op {
 			const void *out;
 		} buf;
 	} data;
+
 };
 
 #define SPI_MEM_OP(__cmd, __addr, __dummy, __data)		\
@@ -288,9 +291,11 @@ struct spi_controller_mem_ops {
 /**
  * struct spi_controller_mem_caps - SPI memory controller capabilities
  * @dtr: Supports DTR operations
+ * @ecc: Supports operations with error correction
  */
 struct spi_controller_mem_caps {
 	bool dtr;
+	bool ecc;
 };
 
 #define spi_mem_controller_is_capable(ctlr, cap)	\
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	<linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>,
	<linux-spi@vger.kernel.org>
Cc: Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Xiangsheng Hou <xiangsheng.hou@mediatek.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v9 06/13] spi: spi-mem: Add an ecc parameter to the spi_mem_op structure
Date: Tue,  4 Jan 2022 09:36:24 +0100	[thread overview]
Message-ID: <20220104083631.40776-7-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20220104083631.40776-1-miquel.raynal@bootlin.com>

Soon the SPI-NAND core will need a way to request a SPI controller to
enable ECC support for a given operation. This is because of the
pipelined integration of certain ECC engines, which are directly managed
by the SPI controller itself.

Introduce a spi_mem_op additional field for this purpose: ecc.

So far this field is left unset and checked to be false by all
the SPI controller drivers in their ->supports_op() hook, as they all
call spi_mem_default_supports_op().

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/spi/spi-mem.c       | 5 +++++
 include/linux/spi/spi-mem.h | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index ed966d8129eb..f38ac31961c9 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -178,6 +178,11 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
 			return false;
 	}
 
+	if (op->data.ecc) {
+		if (!spi_mem_controller_is_capable(ctlr, ecc))
+			return false;
+	}
+
 	return spi_mem_check_buswidth(mem, op);
 }
 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 4a1bfe689872..051050b40309 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -89,6 +89,7 @@ enum spi_mem_data_dir {
  * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
  * @data.buswidth: number of IO lanes used to send/receive the data
  * @data.dtr: whether the data should be sent in DTR mode or not
+ * @data.ecc: whether error correction is required or not
  * @data.dir: direction of the transfer
  * @data.nbytes: number of data bytes to send/receive. Can be zero if the
  *		 operation does not involve transferring data
@@ -119,6 +120,7 @@ struct spi_mem_op {
 	struct {
 		u8 buswidth;
 		u8 dtr : 1;
+		u8 ecc : 1;
 		enum spi_mem_data_dir dir;
 		unsigned int nbytes;
 		union {
@@ -126,6 +128,7 @@ struct spi_mem_op {
 			const void *out;
 		} buf;
 	} data;
+
 };
 
 #define SPI_MEM_OP(__cmd, __addr, __dummy, __data)		\
@@ -288,9 +291,11 @@ struct spi_controller_mem_ops {
 /**
  * struct spi_controller_mem_caps - SPI memory controller capabilities
  * @dtr: Supports DTR operations
+ * @ecc: Supports operations with error correction
  */
 struct spi_controller_mem_caps {
 	bool dtr;
+	bool ecc;
 };
 
 #define spi_mem_controller_is_capable(ctlr, cap)	\
-- 
2.27.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2022-01-04  8:36 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-04  8:36 [PATCH v9 00/13] External ECC engines & Macronix support Miquel Raynal
2022-01-04  8:36 ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 01/13] spi: spi-mem: Introduce a capability structure Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-05  5:52   ` Pratyush Yadav
2022-01-05  5:52     ` Pratyush Yadav
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-26 16:35     ` Mark Brown
2022-01-26 16:35       ` Mark Brown
2022-01-26 17:36       ` Miquel Raynal
2022-01-26 17:36         ` Miquel Raynal
2022-01-26 17:41         ` Mark Brown
2022-01-26 17:41           ` Mark Brown
2022-01-27  9:20           ` Miquel Raynal
2022-01-27  9:20             ` Miquel Raynal
2022-01-27  9:37           ` Miquel Raynal
2022-01-27  9:37             ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 02/13] spi: spi-mem: Check the controller extra capabilities Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-05  5:53   ` Pratyush Yadav
2022-01-05  5:53     ` Pratyush Yadav
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 03/13] spi: cadence-quadspi: Provide a capability structure Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 04/13] spi: mxic: " Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 05/13] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-04  8:36 ` Miquel Raynal [this message]
2022-01-04  8:36   ` [PATCH v9 06/13] spi: spi-mem: Add an ecc parameter to the spi_mem_op structure Miquel Raynal
2022-01-04  9:02   ` Boris Brezillon
2022-01-04  9:02     ` Boris Brezillon
2022-01-04  9:24     ` Miquel Raynal
2022-01-04  9:24       ` Miquel Raynal
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 07/13] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:53   ` Miquel Raynal
2022-01-26 10:53     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 08/13] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:52   ` Miquel Raynal
2022-01-26 10:52     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 09/13] spi: mxic: Fix the transmit path Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:52   ` Miquel Raynal
2022-01-26 10:52     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 10/13] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:52   ` Miquel Raynal
2022-01-26 10:52     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 11/13] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:52   ` Miquel Raynal
2022-01-26 10:52     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 12/13] spi: mxic: Add support for direct mapping Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:52   ` Miquel Raynal
2022-01-26 10:52     ` Miquel Raynal
2022-01-04  8:36 ` [PATCH v9 13/13] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
2022-01-04  8:36   ` Miquel Raynal
2022-01-26 10:52   ` Miquel Raynal
2022-01-26 10:52     ` Miquel Raynal
2022-01-04  9:04 ` [PATCH v9 00/13] External ECC engines & Macronix support Boris Brezillon
2022-01-04  9:04   ` Boris Brezillon
2022-01-23 16:01 ` Miquel Raynal
2022-01-23 16:01   ` Miquel Raynal

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