From: Miquel Raynal <miquel.raynal@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org> Cc: Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Boris Brezillon <boris.brezillon@collabora.com>, Xiangsheng Hou <xiangsheng.hou@mediatek.com>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v9 08/13] mtd: spinand: Create direct mapping descriptors for ECC operations Date: Tue, 4 Jan 2022 09:36:26 +0100 [thread overview] Message-ID: <20220104083631.40776-9-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20220104083631.40776-1-miquel.raynal@bootlin.com> In order for pipelined ECC engines to be able to enable/disable the ECC engine only when needed and avoid races when future parallel-operations will be supported, we need to provide the information about the use of the ECC engine in the direct mapping hooks. As direct mapping configurations are meant to be static, it is best to create two new mappings: one for regular 'raw' accesses and one for accesses involving correction. It is up to the driver to use or not the new ECC enable boolean contained in the spi-mem operation. As dirmaps are not free (they consume a few pages of MMIO address space) and because these extra entries are only meant to be used by pipelined engines, let's limit their use to this specific type of engine and save a bit of memory with all the other setups. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/spi/core.c | 35 +++++++++++++++++++++++++++++++++-- include/linux/mtd/spinand.h | 2 ++ 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 715cad26fdef..8cbbc320f004 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -381,7 +381,10 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand, } } - rdesc = spinand->dirmaps[req->pos.plane].rdesc; + if (req->mode == MTD_OPS_RAW) + rdesc = spinand->dirmaps[req->pos.plane].rdesc; + else + rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc; while (nbytes) { ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf); @@ -452,7 +455,10 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, req->ooblen); } - wdesc = spinand->dirmaps[req->pos.plane].wdesc; + if (req->mode == MTD_OPS_RAW) + wdesc = spinand->dirmaps[req->pos.plane].wdesc; + else + wdesc = spinand->dirmaps[req->pos.plane].wdesc_ecc; while (nbytes) { ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf); @@ -866,6 +872,31 @@ static int spinand_create_dirmap(struct spinand_device *spinand, spinand->dirmaps[plane].rdesc = desc; + if (nand->ecc.engine->integration != NAND_ECC_ENGINE_INTEGRATION_PIPELINED) { + spinand->dirmaps[plane].wdesc_ecc = spinand->dirmaps[plane].wdesc; + spinand->dirmaps[plane].rdesc_ecc = spinand->dirmaps[plane].rdesc; + + return 0; + } + + info.op_tmpl = *spinand->op_templates.update_cache; + info.op_tmpl.data.ecc = true; + desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev, + spinand->spimem, &info); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + spinand->dirmaps[plane].wdesc_ecc = desc; + + info.op_tmpl = *spinand->op_templates.read_cache; + info.op_tmpl.data.ecc = true; + desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev, + spinand->spimem, &info); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + spinand->dirmaps[plane].rdesc_ecc = desc; + return 0; } diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 6988956b8492..3aa28240a77f 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -389,6 +389,8 @@ struct spinand_info { struct spinand_dirmap { struct spi_mem_dirmap_desc *wdesc; struct spi_mem_dirmap_desc *rdesc; + struct spi_mem_dirmap_desc *wdesc_ecc; + struct spi_mem_dirmap_desc *rdesc_ecc; }; /** -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org> Cc: Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Boris Brezillon <boris.brezillon@collabora.com>, Xiangsheng Hou <xiangsheng.hou@mediatek.com>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v9 08/13] mtd: spinand: Create direct mapping descriptors for ECC operations Date: Tue, 4 Jan 2022 09:36:26 +0100 [thread overview] Message-ID: <20220104083631.40776-9-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20220104083631.40776-1-miquel.raynal@bootlin.com> In order for pipelined ECC engines to be able to enable/disable the ECC engine only when needed and avoid races when future parallel-operations will be supported, we need to provide the information about the use of the ECC engine in the direct mapping hooks. As direct mapping configurations are meant to be static, it is best to create two new mappings: one for regular 'raw' accesses and one for accesses involving correction. It is up to the driver to use or not the new ECC enable boolean contained in the spi-mem operation. As dirmaps are not free (they consume a few pages of MMIO address space) and because these extra entries are only meant to be used by pipelined engines, let's limit their use to this specific type of engine and save a bit of memory with all the other setups. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/spi/core.c | 35 +++++++++++++++++++++++++++++++++-- include/linux/mtd/spinand.h | 2 ++ 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 715cad26fdef..8cbbc320f004 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -381,7 +381,10 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand, } } - rdesc = spinand->dirmaps[req->pos.plane].rdesc; + if (req->mode == MTD_OPS_RAW) + rdesc = spinand->dirmaps[req->pos.plane].rdesc; + else + rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc; while (nbytes) { ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf); @@ -452,7 +455,10 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, req->ooblen); } - wdesc = spinand->dirmaps[req->pos.plane].wdesc; + if (req->mode == MTD_OPS_RAW) + wdesc = spinand->dirmaps[req->pos.plane].wdesc; + else + wdesc = spinand->dirmaps[req->pos.plane].wdesc_ecc; while (nbytes) { ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf); @@ -866,6 +872,31 @@ static int spinand_create_dirmap(struct spinand_device *spinand, spinand->dirmaps[plane].rdesc = desc; + if (nand->ecc.engine->integration != NAND_ECC_ENGINE_INTEGRATION_PIPELINED) { + spinand->dirmaps[plane].wdesc_ecc = spinand->dirmaps[plane].wdesc; + spinand->dirmaps[plane].rdesc_ecc = spinand->dirmaps[plane].rdesc; + + return 0; + } + + info.op_tmpl = *spinand->op_templates.update_cache; + info.op_tmpl.data.ecc = true; + desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev, + spinand->spimem, &info); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + spinand->dirmaps[plane].wdesc_ecc = desc; + + info.op_tmpl = *spinand->op_templates.read_cache; + info.op_tmpl.data.ecc = true; + desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev, + spinand->spimem, &info); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + spinand->dirmaps[plane].rdesc_ecc = desc; + return 0; } diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 6988956b8492..3aa28240a77f 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -389,6 +389,8 @@ struct spinand_info { struct spinand_dirmap { struct spi_mem_dirmap_desc *wdesc; struct spi_mem_dirmap_desc *rdesc; + struct spi_mem_dirmap_desc *wdesc_ecc; + struct spi_mem_dirmap_desc *rdesc_ecc; }; /** -- 2.27.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-01-04 8:36 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-04 8:36 [PATCH v9 00/13] External ECC engines & Macronix support Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 01/13] spi: spi-mem: Introduce a capability structure Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-05 5:52 ` Pratyush Yadav 2022-01-05 5:52 ` Pratyush Yadav 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 16:35 ` Mark Brown 2022-01-26 16:35 ` Mark Brown 2022-01-26 17:36 ` Miquel Raynal 2022-01-26 17:36 ` Miquel Raynal 2022-01-26 17:41 ` Mark Brown 2022-01-26 17:41 ` Mark Brown 2022-01-27 9:20 ` Miquel Raynal 2022-01-27 9:20 ` Miquel Raynal 2022-01-27 9:37 ` Miquel Raynal 2022-01-27 9:37 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 02/13] spi: spi-mem: Check the controller extra capabilities Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-05 5:53 ` Pratyush Yadav 2022-01-05 5:53 ` Pratyush Yadav 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 03/13] spi: cadence-quadspi: Provide a capability structure Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 04/13] spi: mxic: " Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 05/13] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 06/13] spi: spi-mem: Add an ecc parameter to the spi_mem_op structure Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-04 9:02 ` Boris Brezillon 2022-01-04 9:02 ` Boris Brezillon 2022-01-04 9:24 ` Miquel Raynal 2022-01-04 9:24 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 07/13] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-26 10:53 ` Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal [this message] 2022-01-04 8:36 ` [PATCH v9 08/13] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 09/13] spi: mxic: Fix the transmit path Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 10/13] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 11/13] spi: mxic: Create a helper to ease the start of " Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 12/13] spi: mxic: Add support for direct mapping Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-04 8:36 ` [PATCH v9 13/13] spi: mxic: Add support for pipelined ECC operations Miquel Raynal 2022-01-04 8:36 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-26 10:52 ` Miquel Raynal 2022-01-04 9:04 ` [PATCH v9 00/13] External ECC engines & Macronix support Boris Brezillon 2022-01-04 9:04 ` Boris Brezillon 2022-01-23 16:01 ` Miquel Raynal 2022-01-23 16:01 ` Miquel Raynal
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