From: allen-kh.cheng <allen-kh.cheng@mediatek.com> To: Matthias Brugger <matthias.bgg@gmail.com>, Rob Herring <robh+dt@kernel.org>, <nfraprado@collabora.com> Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>, <chun-jie.chen@mediatek.com>, <devicetree@vger.kernel.org>, <drinkcat@chromium.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-mediatek@lists.infradead.org>, <srv_heupstream@mediatek.com>, Chen-Yu Tsai <wenst@chromium.org>, Ryder Lee <ryder.lee@kernel.org>, Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Subject: [PATCH v4 1/5] arm64: dts: mediatek: Correct uart clock of MT8192 Date: Thu, 13 Jan 2022 14:58:18 +0800 [thread overview] Message-ID: <20220113065822.11809-2-allen-kh.cheng@mediatek.com> (raw) In-Reply-To: <20220113065822.11809-1-allen-kh.cheng@mediatek.com> From: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the uart clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index c7c7d4e017ae..cfb67cc40c2c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -327,7 +327,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x1000>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&clk26m>, <&clk26m>; + clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>; clock-names = "baud", "bus"; status = "disabled"; }; @@ -337,7 +337,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11003000 0 0x1000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&clk26m>, <&clk26m>; + clocks = <&clk26m>, <&infracfg CLK_INFRA_UART1>; clock-names = "baud", "bus"; status = "disabled"; }; -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: allen-kh.cheng <allen-kh.cheng@mediatek.com> To: Matthias Brugger <matthias.bgg@gmail.com>, Rob Herring <robh+dt@kernel.org>, <nfraprado@collabora.com> Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>, <chun-jie.chen@mediatek.com>, <devicetree@vger.kernel.org>, <drinkcat@chromium.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-mediatek@lists.infradead.org>, <srv_heupstream@mediatek.com>, Chen-Yu Tsai <wenst@chromium.org>, Ryder Lee <ryder.lee@kernel.org>, Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Subject: [PATCH v4 1/5] arm64: dts: mediatek: Correct uart clock of MT8192 Date: Thu, 13 Jan 2022 14:58:18 +0800 [thread overview] Message-ID: <20220113065822.11809-2-allen-kh.cheng@mediatek.com> (raw) In-Reply-To: <20220113065822.11809-1-allen-kh.cheng@mediatek.com> From: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> When the initial devicetree for mt8192 was added in 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the clock driver for mt8192 was not yet upstream, so the clock property nodes were set to the clk26m clock as a placeholder. Given that the clock driver has since been added through 710573dee31b ("clk: mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings through f35f1a23e0e1 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and devicetree nodes through 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers"), fix the uart clock property to point to the actual clock. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index c7c7d4e017ae..cfb67cc40c2c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -327,7 +327,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x1000>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&clk26m>, <&clk26m>; + clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>; clock-names = "baud", "bus"; status = "disabled"; }; @@ -337,7 +337,7 @@ "mediatek,mt6577-uart"; reg = <0 0x11003000 0 0x1000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&clk26m>, <&clk26m>; + clocks = <&clk26m>, <&infracfg CLK_INFRA_UART1>; clock-names = "baud", "bus"; status = "disabled"; }; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-01-13 6:58 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-13 6:58 [PATCH v4 0/5] Update MT8192 Clock Setting allen-kh.cheng 2022-01-13 6:58 ` allen-kh.cheng 2022-01-13 6:58 ` allen-kh.cheng [this message] 2022-01-13 6:58 ` [PATCH v4 1/5] arm64: dts: mediatek: Correct uart clock of MT8192 allen-kh.cheng 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 6:58 ` [PATCH v4 2/5] arm64: dts: mediatek: Correct SPI " allen-kh.cheng 2022-01-13 6:58 ` allen-kh.cheng 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 6:58 ` [PATCH v4 3/5] arm64: dts: mediatek: Correct Nor Flash " allen-kh.cheng 2022-01-13 6:58 ` allen-kh.cheng 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 6:58 ` [PATCH v4 4/5] arm64: dts: mediatek: Correct I2C " allen-kh.cheng 2022-01-13 6:58 ` allen-kh.cheng 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 6:58 ` [PATCH v4 5/5] arm64: dts: mediatek: Correct system timer " allen-kh.cheng 2022-01-13 6:58 ` allen-kh.cheng 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 10:03 ` AngeloGioacchino Del Regno 2022-01-13 16:07 ` [PATCH v4 0/5] Update MT8192 Clock Setting Matthias Brugger 2022-01-13 16:07 ` Matthias Brugger 2022-01-13 16:07 ` Matthias Brugger
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220113065822.11809-2-allen-kh.cheng@mediatek.com \ --to=allen-kh.cheng@mediatek.com \ --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \ --cc=chun-jie.chen@mediatek.com \ --cc=devicetree@vger.kernel.org \ --cc=drinkcat@chromium.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mediatek@lists.infradead.org \ --cc=matthias.bgg@gmail.com \ --cc=nfraprado@collabora.com \ --cc=robh+dt@kernel.org \ --cc=ryder.lee@kernel.org \ --cc=srv_heupstream@mediatek.com \ --cc=wenst@chromium.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.