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From: Tony Luck <tony.luck@intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Smita Koralahalli Channabasappa
	<smita.koralahallichannabasappa@amd.com>,
	Wei Huang <wei.huang2@amd.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	patches@lists.linux.dev, Tony Luck <tony.luck@intel.com>,
	Ailin Xu <ailin.xu@intel.com>
Subject: [PATCH v2 1/6] x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN
Date: Fri, 21 Jan 2022 09:47:38 -0800	[thread overview]
Message-ID: <20220121174743.1875294-2-tony.luck@intel.com> (raw)
In-Reply-To: <20220121174743.1875294-1-tony.luck@intel.com>

Missed adding the Icelake-D CPU to the list. It uses the same MSRs
to control and read the inventory number as all the other models.

Reported-by: Ailin Xu <ailin.xu@intel.com>
Fixes: dc6b025de95b ("x86/mce: Add Xeon Icelake to list of CPUs that support PPIN")
Cc: <stable@vger.kernel.org>
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
 arch/x86/kernel/cpu/mce/intel.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
index bb9a46a804bf..baafbb37be67 100644
--- a/arch/x86/kernel/cpu/mce/intel.c
+++ b/arch/x86/kernel/cpu/mce/intel.c
@@ -486,6 +486,7 @@ static void intel_ppin_init(struct cpuinfo_x86 *c)
 	case INTEL_FAM6_BROADWELL_X:
 	case INTEL_FAM6_SKYLAKE_X:
 	case INTEL_FAM6_ICELAKE_X:
+	case INTEL_FAM6_ICELAKE_D:
 	case INTEL_FAM6_SAPPHIRERAPIDS_X:
 	case INTEL_FAM6_XEON_PHI_KNL:
 	case INTEL_FAM6_XEON_PHI_KNM:
-- 
2.31.1


  reply	other threads:[~2022-01-21 17:48 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-07 22:54 [PATCH 0/5] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-07 22:54 ` [PATCH 1/5] x86/ras: Merge Intel and AMD ppin_init() functions Tony Luck
2022-01-18 20:02   ` Borislav Petkov
2022-01-18 21:03     ` Luck, Tony
2022-01-18 21:15       ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 2/5] x86/ras: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-01-20 13:32   ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 3/5] x86/ras: Read/save PPIN MSR during initialization Tony Luck
2022-01-07 22:54 ` [PATCH 4/5] x86/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-01-20 13:32   ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 5/5] x86/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-01-20 13:35   ` Borislav Petkov
2022-01-20 18:01     ` Luck, Tony
2022-01-20 22:48       ` Borislav Petkov
2022-01-21 17:47 ` [PATCH v2 0/6] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-21 17:47   ` Tony Luck [this message]
2022-01-25 17:55     ` [tip: x86/urgent] x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN tip-bot2 for Tony Luck
2022-01-21 17:47   ` [PATCH v2 2/6] x86/cpu: Merge Intel and AMD ppin_init() functions Tony Luck
2022-01-27 10:22     ` Borislav Petkov
2022-01-27 16:52       ` Luck, Tony
2022-01-21 17:47   ` [PATCH v2 3/6] x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-01-21 17:47   ` [PATCH v2 4/6] x86/cpu: Read/save PPIN MSR during initialization Tony Luck
2022-01-21 17:47   ` [PATCH v2 5/6] topology/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-01-31 11:34     ` Greg Kroah-Hartman
2022-01-21 17:47   ` [PATCH v2 6/6] topology/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-01-31 11:35     ` Greg Kroah-Hartman
2022-01-31 12:31   ` [PATCH v2 0/6] PPIN (Protected Processor Inventory Number) updates Borislav Petkov
2022-01-31 17:23     ` Luck, Tony
2022-01-31 18:18       ` Borislav Petkov
2022-01-31 18:49         ` Luck, Tony
2022-01-31 19:10           ` Borislav Petkov
2022-01-31 19:29             ` Luck, Tony
2022-01-31 21:58               ` Borislav Petkov
2022-01-31 22:03                 ` Luck, Tony
2022-04-06 22:01                 ` [PATCH] topology/sysfs: Hide PPIN on systems that do not support it Tony Luck
2022-04-25 22:46                   ` Andrew Morton
2022-04-25 22:56                     ` Luck, Tony
2022-01-31 23:01   ` [PATCH v3 0/5] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-31 23:01     ` [PATCH v3 1/5] x86/cpu: Merge Intel and AMD ppin_init() functions Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 2/5] x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 3/5] x86/cpu: Read/save PPIN MSR during initialization Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 4/5] topology/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 5/5] topology/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck

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