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From: Yang Zhong <yang.zhong@intel.com>
To: qemu-devel@nongnu.org
Cc: yang.zhong@intel.com, kevin.tian@intel.com, seanjc@google.com,
	jing2.liu@linux.intel.com, wei.w.wang@intel.com,
	guang.zeng@intel.com, pbonzini@redhat.com
Subject: [PATCH 1/7] x86: Fix the 64-byte boundary enumeration for extended state
Date: Sun, 23 Jan 2022 23:55:17 -0800	[thread overview]
Message-ID: <20220124075523.108875-2-yang.zhong@intel.com> (raw)
In-Reply-To: <20220124075523.108875-1-yang.zhong@intel.com>

From: Jing Liu <jing2.liu@intel.com>

The extended state subleaves (EAX=0Dh, ECX=n, n>1).ECX[1]
indicate whether the extended state component locates
on the next 64-byte boundary following the preceding state
component when the compacted format of an XSAVE area is
used.

Right now, they are all zero because no supported component
needed the bit to be set, but the upcoming AMX feature will
use it.  Fix the subleaves value according to KVM's supported
cpuid.

Signed-off-by: Jing Liu <jing2.liu@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
---
 target/i386/cpu.h         | 6 ++++++
 target/i386/cpu.c         | 1 +
 target/i386/kvm/kvm-cpu.c | 2 ++
 3 files changed, 9 insertions(+)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9911d7c871..de1dc124ab 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -548,6 +548,11 @@ typedef enum X86Seg {
 #define XSTATE_Hi16_ZMM_MASK            (1ULL << XSTATE_Hi16_ZMM_BIT)
 #define XSTATE_PKRU_MASK                (1ULL << XSTATE_PKRU_BIT)
 
+#define ESA_FEATURE_ALIGN64_BIT         1
+
+#define ESA_FEATURE_ALIGN64_MASK        (1U << ESA_FEATURE_ALIGN64_BIT)
+
+
 /* CPUID feature words */
 typedef enum FeatureWord {
     FEAT_1_EDX,         /* CPUID[1].EDX */
@@ -1354,6 +1359,7 @@ QEMU_BUILD_BUG_ON(sizeof(XSavePKRU) != 0x8);
 typedef struct ExtSaveArea {
     uint32_t feature, bits;
     uint32_t offset, size;
+    uint32_t ecx;
 } ExtSaveArea;
 
 #define XSAVE_STATE_AREA_COUNT (XSTATE_PKRU_BIT + 1)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index aa9e636800..37f06b0b1a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5487,6 +5487,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
                 const ExtSaveArea *esa = &x86_ext_save_areas[count];
                 *eax = esa->size;
                 *ebx = esa->offset;
+                *ecx = esa->ecx & ESA_FEATURE_ALIGN64_MASK;
             }
         }
         break;
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index d95028018e..033ca011ea 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -105,6 +105,8 @@ static void kvm_cpu_xsave_init(void)
                 assert(esa->size == sz);
                 esa->offset = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EBX);
             }
+
+            esa->ecx = kvm_arch_get_supported_cpuid(s, 0xd, i, R_ECX);
         }
     }
 }


  reply	other threads:[~2022-01-24  8:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-24  7:55 [PATCH 0/7] AMX support in Qemu Yang Zhong
2022-01-24  7:55 ` Yang Zhong [this message]
2022-01-24  7:55 ` [PATCH 2/7] x86: Add AMX XTILECFG and XTILEDATA components Yang Zhong
2022-01-24  7:55 ` [PATCH 3/7] x86: Grant AMX permission for guest Yang Zhong
2022-01-24 10:16   ` Paolo Bonzini
2022-01-27 13:45     ` Yang Zhong
2022-01-28 11:09       ` Paolo Bonzini
2022-01-24  7:55 ` [PATCH 4/7] x86: Add XFD faulting bit for state components Yang Zhong
2022-01-24  7:55 ` [PATCH 5/7] x86: Add AMX CPUIDs enumeration Yang Zhong
2022-01-24 10:13   ` Paolo Bonzini
2022-01-27 13:46     ` Yang Zhong
2022-01-24  7:55 ` [PATCH 6/7] x86: add support for KVM_CAP_XSAVE2 and AMX state migration Yang Zhong
2022-01-24 10:15   ` Paolo Bonzini
2022-01-27 13:47     ` Yang Zhong
2022-01-24  7:55 ` [PATCH 7/7] x86: Support XFD and AMX xsave data migration Yang Zhong
2022-01-24 10:17 ` [PATCH 0/7] AMX support in Qemu Paolo Bonzini

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