From: Miquel Raynal <miquel.raynal@bootlin.com> To: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org> Cc: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>, Boris Brezillon <boris.brezillon@collabora.com>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v10 11/13] spi: mxic: Create a helper to ease the start of an operation Date: Thu, 27 Jan 2022 10:18:06 +0100 [thread overview] Message-ID: <20220127091808.1043392-12-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20220127091808.1043392-1-miquel.raynal@bootlin.com> Create the mxic_spi_mem_prep_op_cfg() helper to provide the content to write to the register controlling the next IO command. This helper will soon be used by the dirmap implementation and having this code factorized out earlier will clarify this addition. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-12-miquel.raynal@bootlin.com --- drivers/spi/spi-mxic.c | 53 +++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index c45f949a864d..ba9cda4bf161 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -296,6 +296,33 @@ static u32 mxic_spi_prep_hc_cfg(struct spi_device *spi, u32 flags) HC_CFG_SLV_ACT(spi->chip_select) | HC_CFG_IDLE_SIO_LVL(1); } +static u32 mxic_spi_mem_prep_op_cfg(const struct spi_mem_op *op) +{ + u32 cfg = OP_CMD_BYTES(op->cmd.nbytes) | + OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | + (op->cmd.dtr ? OP_CMD_DDR : 0); + + if (op->addr.nbytes) + cfg |= OP_ADDR_BYTES(op->addr.nbytes) | + OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | + (op->addr.dtr ? OP_ADDR_DDR : 0); + + if (op->dummy.nbytes) + cfg |= OP_DUMMY_CYC(op->dummy.nbytes); + + if (op->data.nbytes) { + cfg |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | + (op->data.dtr ? OP_DATA_DDR : 0); + if (op->data.dir == SPI_MEM_DATA_IN) { + cfg |= OP_READ; + if (op->data.dtr) + cfg |= OP_DQS_EN; + } + } + + return cfg; +} + static int mxic_spi_data_xfer(struct mxic_spi *mxic, const void *txbuf, void *rxbuf, unsigned int len) { @@ -366,7 +393,6 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, { struct mxic_spi *mxic = spi_master_get_devdata(mem->spi->master); int i, ret; - u32 ss_ctrl; u8 addr[8], cmd[2]; ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz); @@ -378,29 +404,8 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, writel(HC_EN_BIT, mxic->regs + HC_EN); - ss_ctrl = OP_CMD_BYTES(op->cmd.nbytes) | - OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | - (op->cmd.dtr ? OP_CMD_DDR : 0); - - if (op->addr.nbytes) - ss_ctrl |= OP_ADDR_BYTES(op->addr.nbytes) | - OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | - (op->addr.dtr ? OP_ADDR_DDR : 0); - - if (op->dummy.nbytes) - ss_ctrl |= OP_DUMMY_CYC(op->dummy.nbytes); - - if (op->data.nbytes) { - ss_ctrl |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | - (op->data.dtr ? OP_DATA_DDR : 0); - if (op->data.dir == SPI_MEM_DATA_IN) { - ss_ctrl |= OP_READ; - if (op->data.dtr) - ss_ctrl |= OP_DQS_EN; - } - } - - writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select)); + writel(mxic_spi_mem_prep_op_cfg(op), + mxic->regs + SS_CTRL(mem->spi->chip_select)); writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT, mxic->regs + HC_CFG); -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com> To: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org> Cc: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <Tudor.Ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>, Boris Brezillon <boris.brezillon@collabora.com>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v10 11/13] spi: mxic: Create a helper to ease the start of an operation Date: Thu, 27 Jan 2022 10:18:06 +0100 [thread overview] Message-ID: <20220127091808.1043392-12-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20220127091808.1043392-1-miquel.raynal@bootlin.com> Create the mxic_spi_mem_prep_op_cfg() helper to provide the content to write to the register controlling the next IO command. This helper will soon be used by the dirmap implementation and having this code factorized out earlier will clarify this addition. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-12-miquel.raynal@bootlin.com --- drivers/spi/spi-mxic.c | 53 +++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index c45f949a864d..ba9cda4bf161 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -296,6 +296,33 @@ static u32 mxic_spi_prep_hc_cfg(struct spi_device *spi, u32 flags) HC_CFG_SLV_ACT(spi->chip_select) | HC_CFG_IDLE_SIO_LVL(1); } +static u32 mxic_spi_mem_prep_op_cfg(const struct spi_mem_op *op) +{ + u32 cfg = OP_CMD_BYTES(op->cmd.nbytes) | + OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | + (op->cmd.dtr ? OP_CMD_DDR : 0); + + if (op->addr.nbytes) + cfg |= OP_ADDR_BYTES(op->addr.nbytes) | + OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | + (op->addr.dtr ? OP_ADDR_DDR : 0); + + if (op->dummy.nbytes) + cfg |= OP_DUMMY_CYC(op->dummy.nbytes); + + if (op->data.nbytes) { + cfg |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | + (op->data.dtr ? OP_DATA_DDR : 0); + if (op->data.dir == SPI_MEM_DATA_IN) { + cfg |= OP_READ; + if (op->data.dtr) + cfg |= OP_DQS_EN; + } + } + + return cfg; +} + static int mxic_spi_data_xfer(struct mxic_spi *mxic, const void *txbuf, void *rxbuf, unsigned int len) { @@ -366,7 +393,6 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, { struct mxic_spi *mxic = spi_master_get_devdata(mem->spi->master); int i, ret; - u32 ss_ctrl; u8 addr[8], cmd[2]; ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz); @@ -378,29 +404,8 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem, writel(HC_EN_BIT, mxic->regs + HC_EN); - ss_ctrl = OP_CMD_BYTES(op->cmd.nbytes) | - OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) | - (op->cmd.dtr ? OP_CMD_DDR : 0); - - if (op->addr.nbytes) - ss_ctrl |= OP_ADDR_BYTES(op->addr.nbytes) | - OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) | - (op->addr.dtr ? OP_ADDR_DDR : 0); - - if (op->dummy.nbytes) - ss_ctrl |= OP_DUMMY_CYC(op->dummy.nbytes); - - if (op->data.nbytes) { - ss_ctrl |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) | - (op->data.dtr ? OP_DATA_DDR : 0); - if (op->data.dir == SPI_MEM_DATA_IN) { - ss_ctrl |= OP_READ; - if (op->data.dtr) - ss_ctrl |= OP_DQS_EN; - } - } - - writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select)); + writel(mxic_spi_mem_prep_op_cfg(op), + mxic->regs + SS_CTRL(mem->spi->chip_select)); writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT, mxic->regs + HC_CFG); -- 2.27.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-01-27 9:18 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-27 9:17 [PATCH v10 00/13] External ECC engines & Macronix support Miquel Raynal 2022-01-27 9:17 ` Miquel Raynal 2022-01-27 9:17 ` [PATCH v10 01/13] spi: spi-mem: Introduce a capability structure Miquel Raynal 2022-01-27 9:17 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:17 ` [PATCH v10 02/13] spi: spi-mem: Check the controller extra capabilities Miquel Raynal 2022-01-27 9:17 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:17 ` [PATCH v10 03/13] spi: cadence-quadspi: Provide a capability structure Miquel Raynal 2022-01-27 9:17 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:17 ` [PATCH v10 04/13] spi: mxic: " Miquel Raynal 2022-01-27 9:17 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 05/13] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 06/13] spi: spi-mem: Add an ecc parameter to the spi_mem_op structure Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-28 8:03 ` Tudor.Ambarus 2022-01-28 8:03 ` Tudor.Ambarus 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 07/13] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 08/13] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 09/13] spi: mxic: Fix the transmit path Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 10/13] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-31 16:22 ` Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal [this message] 2022-01-27 9:18 ` [PATCH v10 11/13] spi: mxic: Create a helper to ease the start of " Miquel Raynal 2022-01-31 16:21 ` Miquel Raynal 2022-01-31 16:21 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 12/13] spi: mxic: Add support for direct mapping Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:21 ` Miquel Raynal 2022-01-31 16:21 ` Miquel Raynal 2022-01-27 9:18 ` [PATCH v10 13/13] spi: mxic: Add support for pipelined ECC operations Miquel Raynal 2022-01-27 9:18 ` Miquel Raynal 2022-01-31 16:21 ` Miquel Raynal 2022-01-31 16:21 ` Miquel Raynal 2022-01-27 19:56 ` [PATCH v10 00/13] External ECC engines & Macronix support Mark Brown 2022-01-27 19:56 ` Mark Brown 2022-01-28 8:08 ` Miquel Raynal 2022-01-28 8:08 ` Miquel Raynal 2022-01-28 22:34 ` Mark Brown 2022-01-28 22:34 ` Mark Brown 2022-01-31 13:49 ` Miquel Raynal 2022-01-31 13:49 ` Miquel Raynal
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