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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	<linux-mtd@lists.infradead.org>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v10 01/13] spi: spi-mem: Introduce a capability structure
Date: Thu, 27 Jan 2022 10:17:56 +0100	[thread overview]
Message-ID: <20220127091808.1043392-2-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20220127091808.1043392-1-miquel.raynal@bootlin.com>

Create a spi_controller_mem_caps structure and put it within the
spi_controller structure close to the spi_controller_mem_ops
strucure. So far the only field in this structure is the support for dtr
operations, but soon we will add another parameter.

Also create a helper to parse the capabilities and check if the
requested capability has been set or not.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-2-miquel.raynal@bootlin.com
---
 include/linux/spi/spi-mem.h | 11 +++++++++++
 include/linux/spi/spi.h     |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 85e2ff7b840d..38e5d45c9842 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -285,6 +285,17 @@ struct spi_controller_mem_ops {
 			   unsigned long timeout_ms);
 };
 
+/**
+ * struct spi_controller_mem_caps - SPI memory controller capabilities
+ * @dtr: Supports DTR operations
+ */
+struct spi_controller_mem_caps {
+	bool dtr;
+};
+
+#define spi_mem_controller_is_capable(ctlr, cap)	\
+	((ctlr)->mem_caps && (ctlr)->mem_caps->cap)
+
 /**
  * struct spi_mem_driver - SPI memory driver
  * @spidrv: inherit from a SPI driver
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 7ab3fed7b804..cf99a1ee0e74 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -23,6 +23,7 @@ struct ptp_system_timestamp;
 struct spi_controller;
 struct spi_transfer;
 struct spi_controller_mem_ops;
+struct spi_controller_mem_caps;
 
 /*
  * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
@@ -415,6 +416,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
  * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
  *	     This field is optional and should only be implemented if the
  *	     controller has native support for memory like operations.
+ * @mem_caps: controller capabilities for the handling of memory operations.
  * @unprepare_message: undo any work done by prepare_message().
  * @slave_abort: abort the ongoing transfer request on an SPI slave controller
  * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
@@ -639,6 +641,7 @@ struct spi_controller {
 
 	/* Optimized handlers for SPI memory-like operations. */
 	const struct spi_controller_mem_ops *mem_ops;
+	const struct spi_controller_mem_caps *mem_caps;
 
 	/* gpio chip select */
 	int			*cs_gpios;
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	<linux-mtd@lists.infradead.org>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v10 01/13] spi: spi-mem: Introduce a capability structure
Date: Thu, 27 Jan 2022 10:17:56 +0100	[thread overview]
Message-ID: <20220127091808.1043392-2-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20220127091808.1043392-1-miquel.raynal@bootlin.com>

Create a spi_controller_mem_caps structure and put it within the
spi_controller structure close to the spi_controller_mem_ops
strucure. So far the only field in this structure is the support for dtr
operations, but soon we will add another parameter.

Also create a helper to parse the capabilities and check if the
requested capability has been set or not.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-2-miquel.raynal@bootlin.com
---
 include/linux/spi/spi-mem.h | 11 +++++++++++
 include/linux/spi/spi.h     |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 85e2ff7b840d..38e5d45c9842 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -285,6 +285,17 @@ struct spi_controller_mem_ops {
 			   unsigned long timeout_ms);
 };
 
+/**
+ * struct spi_controller_mem_caps - SPI memory controller capabilities
+ * @dtr: Supports DTR operations
+ */
+struct spi_controller_mem_caps {
+	bool dtr;
+};
+
+#define spi_mem_controller_is_capable(ctlr, cap)	\
+	((ctlr)->mem_caps && (ctlr)->mem_caps->cap)
+
 /**
  * struct spi_mem_driver - SPI memory driver
  * @spidrv: inherit from a SPI driver
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 7ab3fed7b804..cf99a1ee0e74 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -23,6 +23,7 @@ struct ptp_system_timestamp;
 struct spi_controller;
 struct spi_transfer;
 struct spi_controller_mem_ops;
+struct spi_controller_mem_caps;
 
 /*
  * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
@@ -415,6 +416,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
  * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
  *	     This field is optional and should only be implemented if the
  *	     controller has native support for memory like operations.
+ * @mem_caps: controller capabilities for the handling of memory operations.
  * @unprepare_message: undo any work done by prepare_message().
  * @slave_abort: abort the ongoing transfer request on an SPI slave controller
  * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
@@ -639,6 +641,7 @@ struct spi_controller {
 
 	/* Optimized handlers for SPI memory-like operations. */
 	const struct spi_controller_mem_ops *mem_ops;
+	const struct spi_controller_mem_caps *mem_caps;
 
 	/* gpio chip select */
 	int			*cs_gpios;
-- 
2.27.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2022-01-27  9:18 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-27  9:17 [PATCH v10 00/13] External ECC engines & Macronix support Miquel Raynal
2022-01-27  9:17 ` Miquel Raynal
2022-01-27  9:17 ` Miquel Raynal [this message]
2022-01-27  9:17   ` [PATCH v10 01/13] spi: spi-mem: Introduce a capability structure Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:17 ` [PATCH v10 02/13] spi: spi-mem: Check the controller extra capabilities Miquel Raynal
2022-01-27  9:17   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:17 ` [PATCH v10 03/13] spi: cadence-quadspi: Provide a capability structure Miquel Raynal
2022-01-27  9:17   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:17 ` [PATCH v10 04/13] spi: mxic: " Miquel Raynal
2022-01-27  9:17   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 05/13] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 06/13] spi: spi-mem: Add an ecc parameter to the spi_mem_op structure Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-28  8:03   ` Tudor.Ambarus
2022-01-28  8:03     ` Tudor.Ambarus
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 07/13] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 08/13] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 09/13] spi: mxic: Fix the transmit path Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 10/13] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:22   ` Miquel Raynal
2022-01-31 16:22     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 11/13] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:21   ` Miquel Raynal
2022-01-31 16:21     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 12/13] spi: mxic: Add support for direct mapping Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:21   ` Miquel Raynal
2022-01-31 16:21     ` Miquel Raynal
2022-01-27  9:18 ` [PATCH v10 13/13] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
2022-01-27  9:18   ` Miquel Raynal
2022-01-31 16:21   ` Miquel Raynal
2022-01-31 16:21     ` Miquel Raynal
2022-01-27 19:56 ` [PATCH v10 00/13] External ECC engines & Macronix support Mark Brown
2022-01-27 19:56   ` Mark Brown
2022-01-28  8:08   ` Miquel Raynal
2022-01-28  8:08     ` Miquel Raynal
2022-01-28 22:34     ` Mark Brown
2022-01-28 22:34       ` Mark Brown
2022-01-31 13:49       ` Miquel Raynal
2022-01-31 13:49         ` Miquel Raynal

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