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From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk, richard.henderson@linaro.org,
	Song Gao <gaosong@loongson.cn>
Subject: [RFC PATCH v5 12/30] target/loongarch: Add timer related instructions support.
Date: Thu, 27 Jan 2022 22:43:54 -0500	[thread overview]
Message-ID: <20220128034412.1262452-13-yangxiaojuan@loongson.cn> (raw)
In-Reply-To: <20220128034412.1262452-1-yangxiaojuan@loongson.cn>

This includes:
-RDTIME{L/H}.W
-RDTIME.D

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/helper.h                     |  1 +
 target/loongarch/insn_trans/trans_extra.c.inc | 32 +++++++++++++++++++
 target/loongarch/op_helper.c                  |  6 ++++
 target/loongarch/translate.c                  |  2 ++
 4 files changed, 41 insertions(+)

diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
index c916f2650b..035bd141ed 100644
--- a/target/loongarch/helper.h
+++ b/target/loongarch/helper.h
@@ -116,4 +116,5 @@ DEF_HELPER_4(lddir, tl, env, tl, tl, i32)
 DEF_HELPER_4(ldpte, void, env, tl, tl, i32)
 DEF_HELPER_1(ertn, void, env)
 DEF_HELPER_1(idle, void, env)
+DEF_HELPER_1(rdtime_d, i64, env)
 #endif /* !CONFIG_USER_ONLY */
diff --git a/target/loongarch/insn_trans/trans_extra.c.inc b/target/loongarch/insn_trans/trans_extra.c.inc
index 2ce95d3382..8d3425ba61 100644
--- a/target/loongarch/insn_trans/trans_extra.c.inc
+++ b/target/loongarch/insn_trans/trans_extra.c.inc
@@ -33,22 +33,54 @@ static bool trans_asrtgt_d(DisasContext *ctx, arg_asrtgt_d * a)
     return true;
 }
 
+#ifndef CONFIG_USER_ONLY
+static bool gen_rdtime(DisasContext *ctx, arg_rr *a,
+                       bool word, bool high)
+{
+    TCGv dst1 = gpr_dst(ctx, a->rd, EXT_NONE);
+    TCGv dst2 = gpr_dst(ctx, a->rj, EXT_NONE);
+
+    if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
+        gen_io_start();
+    }
+    gen_helper_rdtime_d(dst1, cpu_env);
+    if (word) {
+        tcg_gen_sextract_tl(dst1, dst1, high ? 32 : 0, 32);
+    }
+    tcg_gen_ld_i64(dst2, cpu_env, offsetof(CPULoongArchState, CSR_TID));
+
+    return true;
+}
+#endif
+
 static bool trans_rdtimel_w(DisasContext *ctx, arg_rdtimel_w *a)
 {
+#ifdef CONFIG_USER_ONLY
     tcg_gen_movi_tl(cpu_gpr[a->rd], 0);
     return true;
+#else
+    return gen_rdtime(ctx, a, 1, 0);
+#endif
 }
 
 static bool trans_rdtimeh_w(DisasContext *ctx, arg_rdtimeh_w *a)
 {
+#ifdef CONFIG_USER_ONLY
     tcg_gen_movi_tl(cpu_gpr[a->rd], 0);
     return true;
+#else
+    return gen_rdtime(ctx, a, 1, 1);
+#endif
 }
 
 static bool trans_rdtime_d(DisasContext *ctx, arg_rdtime_d *a)
 {
+#ifdef CONFIG_USER_ONLY
     tcg_gen_movi_tl(cpu_gpr[a->rd], 0);
     return true;
+#else
+    return gen_rdtime(ctx, a, 0, 0);
+#endif
 }
 
 static bool trans_cpucfg(DisasContext *ctx, arg_cpucfg *a)
diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
index 5db1982c48..b1d9df1f0e 100644
--- a/target/loongarch/op_helper.c
+++ b/target/loongarch/op_helper.c
@@ -127,4 +127,10 @@ void helper_idle(CPULoongArchState *env)
     cpu_reset_interrupt(cs, CPU_INTERRUPT_WAKE);
     do_raise_exception(env, EXCP_HLT, 0);
 }
+
+uint64_t helper_rdtime_d(CPULoongArchState *env)
+{
+     LoongArchCPU *cpu = LOONGARCH_CPU(env_cpu(env));
+     return cpu_loongarch_get_constant_timer_counter(cpu);
+}
 #endif /* !CONFIG_USER_ONLY */
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
index c1cac2f006..9ce003980d 100644
--- a/target/loongarch/translate.c
+++ b/target/loongarch/translate.c
@@ -25,6 +25,8 @@ static TCGv cpu_lladdr, cpu_llval;
 TCGv_i32 cpu_fcsr0;
 TCGv_i64 cpu_fpr[32];
 
+#include "exec/gen-icount.h"
+
 #define DISAS_STOP       DISAS_TARGET_0
 #define DISAS_EXIT       DISAS_TARGET_1
 
-- 
2.27.0



  parent reply	other threads:[~2022-01-28  4:07 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-28  3:43 [RFC PATCH v5 00/30] Add LoongArch softmmu support Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 01/30] target/loongarch: Add system emulation introduction Xiaojuan Yang
2022-02-05 13:24   ` Mark Cave-Ayland
2022-01-28  3:43 ` [RFC PATCH v5 02/30] target/loongarch: Add CSRs definition Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 03/30] target/loongarch: Add basic vmstate description of CPU Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 04/30] target/loongarch: Implement qmp_query_cpu_definitions() Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 05/30] target/loongarch: Add constant timer support Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 06/30] target/loongarch: Add MMU support for LoongArch CPU Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 07/30] target/loongarch: Add LoongArch CSR instruction Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 08/30] target/loongarch: Add LoongArch IOCSR instruction Xiaojuan Yang
2022-02-05 12:06   ` Mark Cave-Ayland
2022-01-28  3:43 ` [RFC PATCH v5 09/30] target/loongarch: Add TLB instruction support Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 10/30] target/loongarch: Add other core instructions support Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 11/30] target/loongarch: Add LoongArch interrupt and exception handle Xiaojuan Yang
2022-01-28  3:43 ` Xiaojuan Yang [this message]
2022-01-28  3:43 ` [RFC PATCH v5 13/30] target/loongarch: Add gdb support Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 14/30] hw/pci-host: Add ls7a1000 PCIe Host bridge support for Loongson3 Platform Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 15/30] hw/loongarch: Add support loongson3-ls7a machine type Xiaojuan Yang
2022-01-28  3:43 ` [RFC PATCH v5 16/30] hw/loongarch: Add LoongArch cpu interrupt support(CPUINTC) Xiaojuan Yang
2022-02-05 12:13   ` Mark Cave-Ayland
2022-01-28  3:43 ` [RFC PATCH v5 17/30] hw/loongarch: Add LoongArch ipi interrupt support(IPI) Xiaojuan Yang
2022-02-05 12:22   ` Mark Cave-Ayland
2022-01-28  3:44 ` [RFC PATCH v5 18/30] hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC) Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 19/30] hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI) Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 20/30] hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) Xiaojuan Yang
2022-02-05 13:08   ` Mark Cave-Ayland
2022-01-28  3:44 ` [RFC PATCH v5 21/30] hw/loongarch: Add irq hierarchy for the system Xiaojuan Yang
2022-02-05 13:16   ` Mark Cave-Ayland
2022-01-28  3:44 ` [RFC PATCH v5 22/30] Enable common virtio pci support for LoongArch Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 23/30] hw/loongarch: Add some devices support for 3A5000 Xiaojuan Yang
2022-02-05 13:20   ` Mark Cave-Ayland
2022-01-28  3:44 ` [RFC PATCH v5 24/30] hw/loongarch: Add LoongArch ls7a rtc device support Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 25/30] hw/loongarch: Add default bios startup support Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 26/30] hw/loongarch: Add -kernel and -initrd options support Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 27/30] hw/loongarch: Add LoongArch smbios support Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 28/30] hw/loongarch: Add LoongArch acpi support Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 29/30] hw/loongarch: Add fdt support Xiaojuan Yang
2022-01-28  3:44 ` [RFC PATCH v5 30/30] tests/tcg/loongarch64: Add hello/memory test in loongarch64 system Xiaojuan Yang

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