All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 14/17] drm/i915: Program pch transcoder m2/n2
Date: Fri, 28 Jan 2022 12:37:54 +0200	[thread overview]
Message-ID: <20220128103757.22461-15-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220128103757.22461-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Program the PCH transcoder M2/N2 values appropriately. We're
still missing a few things for PCH port DRRS but at least this
means we can do readout/state check for dp_m2_n2 unconditionally.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c         |  3 +-
 .../gpu/drm/i915/display/intel_pch_display.c  | 36 +++++++++++++++----
 .../gpu/drm/i915/display/intel_pch_display.h  |  6 ++--
 3 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 34c7640386b8..f67bbaaad8e0 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -339,7 +339,8 @@ static void g4x_dp_get_m_n(struct intel_crtc_state *crtc_state)
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
 	if (crtc_state->has_pch_encoder) {
-		intel_pch_transcoder_get_m_n(crtc, &crtc_state->dp_m_n);
+		intel_pch_transcoder_get_m1_n1(crtc, &crtc_state->dp_m_n);
+		intel_pch_transcoder_get_m2_n2(crtc, &crtc_state->dp_m2_n2);
 	} else {
 		intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder,
 					       &crtc_state->dp_m_n);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 3bd96411f306..9192769e3337 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -88,8 +88,8 @@ static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
 			pipe_name(pipe));
 }
 
-static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
-					 const struct intel_link_m_n *m_n)
+static void intel_pch_transcoder_set_m1_n1(struct intel_crtc *crtc,
+					   const struct intel_link_m_n *m_n)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
@@ -99,8 +99,19 @@ static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
 		      PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));
 }
 
-void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
-				  struct intel_link_m_n *m_n)
+static void intel_pch_transcoder_set_m2_n2(struct intel_crtc *crtc,
+					   const struct intel_link_m_n *m_n)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum pipe pipe = crtc->pipe;
+
+	intel_set_m_n(dev_priv, m_n,
+		      PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe),
+		      PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe));
+}
+
+void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,
+				    struct intel_link_m_n *m_n)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
@@ -110,6 +121,17 @@ void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
 		      PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));
 }
 
+void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc,
+				    struct intel_link_m_n *m_n)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum pipe pipe = crtc->pipe;
+
+	intel_get_m_n(dev_priv, m_n,
+		      PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe),
+		      PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe));
+}
+
 static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state,
 					   enum pipe pch_transcoder)
 {
@@ -300,8 +322,10 @@ void ilk_pch_enable(struct intel_atomic_state *state,
 
 	/* set transcoder timing, panel must allow it */
 	assert_pps_unlocked(dev_priv, pipe);
-	if (intel_crtc_has_dp_encoder(crtc_state))
-		intel_pch_transcoder_set_m_n(crtc, &crtc_state->dp_m_n);
+	if (intel_crtc_has_dp_encoder(crtc_state)) {
+		intel_pch_transcoder_set_m1_n1(crtc, &crtc_state->dp_m_n);
+		intel_pch_transcoder_set_m2_n2(crtc, &crtc_state->dp_m2_n2);
+	}
 	ilk_pch_transcoder_set_timings(crtc_state, pipe);
 
 	intel_fdi_normal_train(crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.h b/drivers/gpu/drm/i915/display/intel_pch_display.h
index 9a317b361a96..749473d99320 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.h
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.h
@@ -27,7 +27,9 @@ void lpt_pch_disable(struct intel_atomic_state *state,
 		     struct intel_crtc *crtc);
 void lpt_pch_get_config(struct intel_crtc_state *crtc_state);
 
-void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
-				  struct intel_link_m_n *m_n);
+void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,
+				    struct intel_link_m_n *m_n);
+void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc,
+				    struct intel_link_m_n *m_n);
 
 #endif
-- 
2.34.1


  parent reply	other threads:[~2022-01-28 10:38 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-28 10:37 [Intel-gfx] [PATCH v2 00/17] drm/i915: M/N cleanup Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 01/17] drm/i915: Nuke intel_dp_set_m_n() Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 02/17] drm/i915: Nuke intel_dp_get_m_n() Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 03/17] drm/i915: Nuke ilk_get_fdi_m_n_config() Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 04/17] drm/i915: Split intel_cpu_transcoder_set_m_n() into M1/N1 vs. M2/N2 variants Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 05/17] drm/i915: Split intel_cpu_transcoder_get_m_n() " Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 06/17] drm/i915: Pass crtc+cpu_transcoder to intel_cpu_transcoder_set_m_n() Ville Syrjala
2022-01-31 14:37   ` Jani Nikula
2022-01-31 18:29     ` Ville Syrjälä
2022-01-31 18:42       ` Ville Syrjälä
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 07/17] drm/i915: Move PCH transcoder M/N setup into the PCH code Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 08/17] drm/i915: Move M/N setup to a more logical place on ddi platforms Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 09/17] drm/i915: Extract {i9xx, ilk}_configure_cpu_transcoder() Ville Syrjala
2022-01-28 10:37 ` [PATCH v2 10/17] drm/i915: Disable DRRS on IVB/HSW port != A Ville Syrjala
2022-01-28 10:37   ` [Intel-gfx] " Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 11/17] drm/i915: Extract can_enable_drrs() Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 12/17] drm/i915: Fix intel_cpu_transcoder_has_m2_n2() Ville Syrjala
2022-01-31 15:05   ` Jani Nikula
2022-01-31 18:39     ` Ville Syrjälä
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 13/17] drm/i915: Clear DP M2/N2 when not doing DRRS Ville Syrjala
2022-01-28 10:37 ` Ville Syrjala [this message]
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 15/17] drm/i915: Dump dp_m2_n2 always Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 16/17] drm/i915: Always check dp_m2_n2 on pre-bdw Ville Syrjala
2022-01-28 10:37 ` [Intel-gfx] [PATCH v2 17/17] drm/i915: Document BDW+ DRRS M/N programming requirements Ville Syrjala
2022-01-28 11:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: M/N cleanup (rev3) Patchwork
2022-01-28 11:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-01-28 13:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: M/N cleanup (rev4) Patchwork
2022-01-28 14:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-28 21:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-01-31 15:10 ` [Intel-gfx] [PATCH v2 00/17] drm/i915: M/N cleanup Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220128103757.22461-15-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.