From: guoren@kernel.org To: guoren@kernel.org, anup@brainfault.org, maz@kernel.org, tglx@linutronix.de, palmer@dabbelt.com, samuel@sholland.org Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Guo Ren <guoren@linux.alibaba.com> Subject: [PATCH V7 2/2] irqchip/sifive-plic: Fixup thead,c900-plic DT parse missing Date: Sun, 30 Jan 2022 21:56:34 +0800 [thread overview] Message-ID: <20220130135634.1213301-3-guoren@kernel.org> (raw) In-Reply-To: <20220130135634.1213301-1-guoren@kernel.org> From: Guo Ren <guoren@linux.alibaba.com> The thead,c900-plic has been used in opensbi to distinguish PLIC [1]. Although PLICs have the same behaviors in Linux, they are different hardware with some custom initializing in firmware(opensbi). Qute opensbi patch commit-msg by Samuel: The T-HEAD PLIC implementation requires setting a delegation bit to allow access from S-mode. Now that the T-HEAD PLIC has its own compatible string, set this bit automatically from the PLIC driver, instead of reaching into the PLIC's MMIO space from another driver. [1]: https://github.com/riscv-software-src/opensbi/commit/78c2b19218bd62653b9fb31623a42ced45f38ea6 Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Anup Patel <anup@brainfault.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Samuel Holland <samuel@sholland.org> Cc: Thomas Gleixner <tglx@linutronix.de> --- drivers/irqchip/irq-sifive-plic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 259065d271ef..09cc98266d30 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -398,3 +398,4 @@ static int __init plic_init(struct device_node *node, IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init); IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */ +IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */ -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: guoren@kernel.org To: guoren@kernel.org, anup@brainfault.org, maz@kernel.org, tglx@linutronix.de, palmer@dabbelt.com, samuel@sholland.org Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Guo Ren <guoren@linux.alibaba.com> Subject: [PATCH V7 2/2] irqchip/sifive-plic: Fixup thead, c900-plic DT parse missing Date: Sun, 30 Jan 2022 21:56:34 +0800 [thread overview] Message-ID: <20220130135634.1213301-3-guoren@kernel.org> (raw) In-Reply-To: <20220130135634.1213301-1-guoren@kernel.org> From: Guo Ren <guoren@linux.alibaba.com> The thead,c900-plic has been used in opensbi to distinguish PLIC [1]. Although PLICs have the same behaviors in Linux, they are different hardware with some custom initializing in firmware(opensbi). Qute opensbi patch commit-msg by Samuel: The T-HEAD PLIC implementation requires setting a delegation bit to allow access from S-mode. Now that the T-HEAD PLIC has its own compatible string, set this bit automatically from the PLIC driver, instead of reaching into the PLIC's MMIO space from another driver. [1]: https://github.com/riscv-software-src/opensbi/commit/78c2b19218bd62653b9fb31623a42ced45f38ea6 Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Anup Patel <anup@brainfault.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Samuel Holland <samuel@sholland.org> Cc: Thomas Gleixner <tglx@linutronix.de> --- drivers/irqchip/irq-sifive-plic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 259065d271ef..09cc98266d30 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -398,3 +398,4 @@ static int __init plic_init(struct device_node *node, IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init); IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */ +IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */ -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-01-30 13:57 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-30 13:56 [PATCH V7 0/2] Add thead,c900-plic support guoren 2022-01-30 13:56 ` guoren 2022-01-30 13:56 ` [PATCH V7 1/2] dt-bindings: update riscv plic compatible string guoren 2022-01-30 13:56 ` guoren 2022-02-02 1:00 ` Rob Herring 2022-02-02 1:00 ` Rob Herring 2022-02-02 10:53 ` [irqchip: irq/irqchip-fixes] " irqchip-bot for Guo Ren 2022-01-30 13:56 ` guoren [this message] 2022-01-30 13:56 ` [PATCH V7 2/2] irqchip/sifive-plic: Fixup thead, c900-plic DT parse missing guoren 2022-02-02 4:42 ` [PATCH V7 2/2] irqchip/sifive-plic: Fixup thead,c900-plic " Samuel Holland 2022-02-02 4:42 ` Samuel Holland 2022-02-07 9:13 ` Guo Ren 2022-02-07 9:13 ` Guo Ren 2022-02-02 10:53 ` [irqchip: irq/irqchip-fixes] irqchip/sifive-plic: Add missing thead,c900-plic match string irqchip-bot for Guo Ren
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