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From: Ben Walker <benjamin.walker@intel.com>
To: vkoul@kernel.org
Cc: dmaengine@vger.kernel.org, dave.jiang@intel.com,
	Ben Walker <benjamin.walker@intel.com>
Subject: [RESEND 10/10] dmaengine: Revert "cookie bypass for out of order completion"
Date: Tue,  1 Feb 2022 13:38:13 -0700	[thread overview]
Message-ID: <20220201203813.3951461-11-benjamin.walker@intel.com> (raw)
In-Reply-To: <20220201203813.3951461-1-benjamin.walker@intel.com>

This reverts commit 47ec7f09bc107720905c96bc37771e4ed1ff0aed.

This is no longer necessary now that all assumptions about the order of
completions have been removed from the dmaengine client API.

Signed-off-by: Ben Walker <benjamin.walker@intel.com>
---
 .../driver-api/dmaengine/provider.rst         | 19 -------------------
 drivers/dma/dmatest.c                         | 11 +----------
 drivers/dma/idxd/dma.c                        |  1 -
 include/linux/dmaengine.h                     |  2 --
 4 files changed, 1 insertion(+), 32 deletions(-)

diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst
index 7c8ace703c96f..5bb4738ece0c2 100644
--- a/Documentation/driver-api/dmaengine/provider.rst
+++ b/Documentation/driver-api/dmaengine/provider.rst
@@ -262,22 +262,6 @@ Currently, the types available are:
     want to transfer a portion of uncompressed data directly to the
     display to print it
 
-- DMA_COMPLETION_NO_ORDER
-
-  - The device does not support in order completion.
-
-  - The driver should return DMA_OUT_OF_ORDER for device_tx_status if
-    the device is setting this capability.
-
-  - All cookie tracking and checking API should be treated as invalid if
-    the device exports this capability.
-
-  - At this point, this is incompatible with polling option for dmatest.
-
-  - If this cap is set, the user is recommended to provide an unique
-    identifier for each descriptor sent to the DMA device in order to
-    properly track the completion.
-
 - DMA_REPEAT
 
   - The device supports repeated transfers. A repeated transfer, indicated by
@@ -461,9 +445,6 @@ supported.
   - In the case of a cyclic transfer, it should only take into
     account the current period.
 
-  - Should return DMA_OUT_OF_ORDER if the device does not support in order
-    completion and is completing the operation out of order.
-
   - This function can be called in an interrupt context.
 
 - device_config
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index 0574090a80c8c..f8cbeeaf8ed03 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -839,10 +839,7 @@ static int dmatest_func(void *data)
 			result("test timed out", total_tests, src->off, dst->off,
 			       len, 0);
 			goto error_unmap_continue;
-		} else if (status != DMA_COMPLETE &&
-			   !(dma_has_cap(DMA_COMPLETION_NO_ORDER,
-					 dev->cap_mask) &&
-			     status == DMA_OUT_OF_ORDER)) {
+		} else if (status != DMA_COMPLETE) {
 			result(status == DMA_ERROR ?
 			       "completion error status" :
 			       "completion busy status", total_tests, src->off,
@@ -1020,12 +1017,6 @@ static int dmatest_add_channel(struct dmatest_info *info,
 	dtc->chan = chan;
 	INIT_LIST_HEAD(&dtc->threads);
 
-	if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) &&
-	    info->params.polled) {
-		info->params.polled = false;
-		pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n");
-	}
-
 	if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 		if (dmatest == 0) {
 			cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c
index 15bd87c2811e4..3400f49ca3c95 100644
--- a/drivers/dma/idxd/dma.c
+++ b/drivers/dma/idxd/dma.c
@@ -296,7 +296,6 @@ int idxd_register_dma_device(struct idxd_device *idxd)
 	dma->dev = dev;
 
 	dma_cap_set(DMA_PRIVATE, dma->cap_mask);
-	dma_cap_set(DMA_COMPLETION_NO_ORDER, dma->cap_mask);
 	dma->device_release = idxd_dma_release;
 
 	if (idxd->hw.opcap.bits[0] & IDXD_OPCAP_MEMMOVE) {
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 3c545b42723ec..47b0f0db1ef77 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -39,7 +39,6 @@ enum dma_status {
 	DMA_IN_PROGRESS,
 	DMA_PAUSED,
 	DMA_ERROR,
-	DMA_OUT_OF_ORDER,
 };
 
 /**
@@ -63,7 +62,6 @@ enum dma_transaction_type {
 	DMA_SLAVE,
 	DMA_CYCLIC,
 	DMA_INTERLEAVE,
-	DMA_COMPLETION_NO_ORDER,
 	DMA_REPEAT,
 	DMA_LOAD_EOT,
 /* last transaction type for creation of the capabilities mask */
-- 
2.33.1


      parent reply	other threads:[~2022-02-01 20:41 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-01 20:38 [RESEND 00/10] Support polling for out of order completions Ben Walker
2022-02-01 20:38 ` [RESEND 01/10] dmaengine: Remove dma_async_is_complete from client API Ben Walker
2022-02-01 20:38 ` [RESEND 02/10] dmaengine: Move dma_set_tx_state to the provider API header Ben Walker
2022-02-01 20:38 ` [RESEND 03/10] dmaengine: Remove the last, used parameters in dma_async_is_tx_complete Ben Walker
2022-05-03 14:13   ` Vinod Koul
2022-05-03 17:56     ` Walker, Benjamin
2022-02-01 20:38 ` [RESEND 04/10] dmaengine: Remove last, used from dma_tx_state Ben Walker
2022-02-01 20:38 ` [RESEND 05/10] dmaengine: Providers should prefer dma_set_residue over dma_set_tx_state Ben Walker
2022-02-01 20:38 ` [RESEND 06/10] dmaengine: Remove dma_set_tx_state Ben Walker
2022-02-01 20:38 ` [RESEND 07/10] dmaengine: Add provider documentation on cookie assignment Ben Walker
2022-02-01 20:38 ` [RESEND 08/10] dmaengine: idxd: idxd_desc.id is now a u16 Ben Walker
2022-02-01 20:38 ` [RESEND 09/10] dmaengine: idxd: Support device_tx_status Ben Walker
2022-02-01 20:38 ` Ben Walker [this message]

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