From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <p.yadav@ti.com>, <michael@walle.cc>, <broonie@kernel.org> Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <nicolas.ferre@microchip.com>, <zhengxunli@mxic.com.tw>, <jaimeliao@mxic.com.tw>, Tudor Ambarus <tudor.ambarus@microchip.com> Subject: [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag Date: Fri, 18 Feb 2022 16:59:00 +0200 [thread overview] Message-ID: <20220218145900.1440045-5-tudor.ambarus@microchip.com> (raw) In-Reply-To: <20220218145900.1440045-1-tudor.ambarus@microchip.com> Introduce SPI_NOR_DTR_BSWAP16 flag for flashes that don't define the mandatory BFPT table. When set it indicates that the byte order of 16-bit words is swapped when read in 8D-8D-8D mode compared to 1-1-1 mode. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 5 ++++- drivers/mtd/spi-nor/core.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 453d8c54d062..c3128a8e1544 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2572,7 +2572,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params = nor->params; struct spi_nor_erase_map *map = ¶ms->erase_map; - const u8 no_sfdp_flags = nor->info->no_sfdp_flags; + const u16 no_sfdp_flags = nor->info->no_sfdp_flags; u8 i, erase_mask; if (no_sfdp_flags & SPI_NOR_DUAL_READ) { @@ -2613,6 +2613,9 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) SPINOR_OP_PP, SNOR_PROTO_8_8_8_DTR); } + if (no_sfdp_flags & SPI_NOR_DTR_BSWAP16) + nor->flags |= SNOR_F_DTR_BSWAP16; + /* * Sector Erase settings. Sort Erase Types in ascending order, with the * smallest erase size starting at BIT(0). diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 7c077d41c335..1cb887437193 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -362,6 +362,8 @@ struct spi_nor_fixups { * SPI_NOR_OCTAL_READ: flash supports Octal Read. * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. + * SPI_NOR_DTR_BSWAP16: the byte order of 16-bit words is swapped when + * read or written in DTR mode compared to STR mode. * * @fixup_flags: flags that indicate support that can be discovered via SFDP * ideally, but can not be discovered for this particular flash @@ -404,7 +406,7 @@ struct flash_info { #define USE_FSR BIT(10) #define SPI_NOR_XSR_RDY BIT(11) - u8 no_sfdp_flags; + u16 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) #define SECT_4K BIT(1) #define SECT_4K_PMC BIT(2) @@ -413,6 +415,7 @@ struct flash_info { #define SPI_NOR_OCTAL_READ BIT(5) #define SPI_NOR_OCTAL_DTR_READ BIT(6) #define SPI_NOR_OCTAL_DTR_PP BIT(7) +#define SPI_NOR_DTR_BSWAP16 BIT(8) u8 fixup_flags; #define SPI_NOR_4B_OPCODES BIT(0) -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <p.yadav@ti.com>, <michael@walle.cc>, <broonie@kernel.org> Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <nicolas.ferre@microchip.com>, <zhengxunli@mxic.com.tw>, <jaimeliao@mxic.com.tw>, Tudor Ambarus <tudor.ambarus@microchip.com> Subject: [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag Date: Fri, 18 Feb 2022 16:59:00 +0200 [thread overview] Message-ID: <20220218145900.1440045-5-tudor.ambarus@microchip.com> (raw) In-Reply-To: <20220218145900.1440045-1-tudor.ambarus@microchip.com> Introduce SPI_NOR_DTR_BSWAP16 flag for flashes that don't define the mandatory BFPT table. When set it indicates that the byte order of 16-bit words is swapped when read in 8D-8D-8D mode compared to 1-1-1 mode. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 5 ++++- drivers/mtd/spi-nor/core.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 453d8c54d062..c3128a8e1544 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2572,7 +2572,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params = nor->params; struct spi_nor_erase_map *map = ¶ms->erase_map; - const u8 no_sfdp_flags = nor->info->no_sfdp_flags; + const u16 no_sfdp_flags = nor->info->no_sfdp_flags; u8 i, erase_mask; if (no_sfdp_flags & SPI_NOR_DUAL_READ) { @@ -2613,6 +2613,9 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) SPINOR_OP_PP, SNOR_PROTO_8_8_8_DTR); } + if (no_sfdp_flags & SPI_NOR_DTR_BSWAP16) + nor->flags |= SNOR_F_DTR_BSWAP16; + /* * Sector Erase settings. Sort Erase Types in ascending order, with the * smallest erase size starting at BIT(0). diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 7c077d41c335..1cb887437193 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -362,6 +362,8 @@ struct spi_nor_fixups { * SPI_NOR_OCTAL_READ: flash supports Octal Read. * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. + * SPI_NOR_DTR_BSWAP16: the byte order of 16-bit words is swapped when + * read or written in DTR mode compared to STR mode. * * @fixup_flags: flags that indicate support that can be discovered via SFDP * ideally, but can not be discovered for this particular flash @@ -404,7 +406,7 @@ struct flash_info { #define USE_FSR BIT(10) #define SPI_NOR_XSR_RDY BIT(11) - u8 no_sfdp_flags; + u16 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) #define SECT_4K BIT(1) #define SECT_4K_PMC BIT(2) @@ -413,6 +415,7 @@ struct flash_info { #define SPI_NOR_OCTAL_READ BIT(5) #define SPI_NOR_OCTAL_DTR_READ BIT(6) #define SPI_NOR_OCTAL_DTR_PP BIT(7) +#define SPI_NOR_DTR_BSWAP16 BIT(8) u8 fixup_flags; #define SPI_NOR_4B_OPCODES BIT(0) -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-02-18 15:01 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-02-18 14:58 [PATCH 0/4] spi-mem: Allow specifying the byte order in DTR mode Tudor Ambarus 2022-02-18 14:58 ` Tudor Ambarus 2022-02-18 14:58 ` [PATCH 1/4] spi: " Tudor Ambarus 2022-02-18 14:58 ` Tudor Ambarus 2022-03-02 10:02 ` Pratyush Yadav 2022-03-02 10:02 ` Pratyush Yadav 2022-03-10 5:31 ` Tudor.Ambarus 2022-03-10 5:31 ` Tudor.Ambarus 2022-03-11 17:47 ` Pratyush Yadav 2022-03-11 17:47 ` Pratyush Yadav 2022-02-18 14:58 ` [PATCH 2/4] mtd: spi-nor: core: " Tudor Ambarus 2022-02-18 14:58 ` Tudor Ambarus 2022-02-21 7:36 ` Michael Walle 2022-02-21 7:36 ` Michael Walle 2022-02-22 14:02 ` Tudor.Ambarus 2022-02-22 14:02 ` Tudor.Ambarus 2022-02-22 14:23 ` Michael Walle 2022-02-22 14:23 ` Michael Walle 2022-03-02 11:34 ` Pratyush Yadav 2022-03-02 11:34 ` Pratyush Yadav 2022-03-10 8:54 ` Tudor.Ambarus 2022-03-10 8:54 ` Tudor.Ambarus 2022-02-18 14:58 ` [PATCH 3/4] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Tudor Ambarus 2022-02-18 14:58 ` Tudor Ambarus 2022-02-21 7:40 ` Michael Walle 2022-02-21 7:40 ` Michael Walle 2022-03-02 12:28 ` Pratyush Yadav 2022-03-02 12:28 ` Pratyush Yadav 2022-02-18 14:59 ` Tudor Ambarus [this message] 2022-02-18 14:59 ` [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag Tudor Ambarus 2022-02-21 7:41 ` Michael Walle 2022-02-21 7:41 ` Michael Walle 2022-03-02 12:30 ` Pratyush Yadav 2022-03-02 12:30 ` Pratyush Yadav 2022-03-10 4:42 ` Tudor.Ambarus 2022-03-10 4:42 ` Tudor.Ambarus 2022-02-21 7:44 ` [PATCH 0/4] spi-mem: Allow specifying the byte order in DTR mode Michael Walle 2022-02-21 7:44 ` Michael Walle 2022-02-22 13:54 ` Tudor.Ambarus 2022-02-22 13:54 ` Tudor.Ambarus 2022-02-22 14:13 ` Michael Walle 2022-02-22 14:13 ` Michael Walle 2022-02-22 14:23 ` Tudor.Ambarus 2022-02-22 14:23 ` Tudor.Ambarus 2022-02-22 14:27 ` Michael Walle 2022-02-22 14:27 ` Michael Walle 2022-02-22 14:43 ` Tudor.Ambarus 2022-02-22 14:43 ` Tudor.Ambarus 2022-02-23 18:38 ` Pratyush Yadav 2022-02-23 18:38 ` Pratyush Yadav 2022-02-24 6:08 ` Tudor.Ambarus 2022-02-24 6:08 ` Tudor.Ambarus 2022-02-24 6:37 ` Tudor.Ambarus 2022-02-24 6:37 ` Tudor.Ambarus 2022-02-24 9:37 ` Michael Walle 2022-02-24 9:37 ` Michael Walle 2022-02-24 10:27 ` Tudor.Ambarus 2022-02-24 10:27 ` Tudor.Ambarus 2022-02-25 7:35 ` zhengxunli 2022-02-25 7:35 ` zhengxunli 2022-02-24 13:24 ` Pratyush Yadav 2022-02-24 13:24 ` Pratyush Yadav 2022-02-24 14:02 ` Michael Walle 2022-02-24 14:02 ` Michael Walle 2022-02-24 14:33 ` Tudor.Ambarus 2022-02-24 14:33 ` Tudor.Ambarus
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