From: jason-jh.lin <jason-jh.lin@mediatek.com> To: Rob Herring <robh+dt@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, "Paolo Bonzini" <pbonzini@redhat.com>, Sean Christopherson <seanjc@google.com>, <maciej.szmigiero@oracle.com>, David Matlack <dmatlack@google.com>, "Jing Zhang" <jingzhangos@google.com>, Marc Zyngier <maz@kernel.org>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, Sean Wang <sean.wang@mediatek.com>, Tinghan Shen <tinghan.shen@mediatek.com> Cc: <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, <ryder.lee@kernel.org>, <wenst@chromium.org>, <chunfeng.yun@mediatek.com>, Seiya Wang <seiya.wang@mediatek.com>, <moudy.ho@mediatek.com>, <roy-cw.yeh@mediatek.com>, <nancy.lin@mediatek.com>, <singo.chang@mediatek.com>, <Macpaul.Lin@mediatek.com>, jason-jh.lin <jason-jh.lin@mediatek.com> Subject: [PATCH v2] arm64: dts: mt8195: add gce node Date: Fri, 25 Feb 2022 10:02:30 +0800 [thread overview] Message-ID: <20220225020230.24472-1-jason-jh.lin@mediatek.com> (raw) Add gce node and gce alias on mt8195 dts file. Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- This patch is based on [1] [1] arm64: dts: Add mediatek SoC mt8195 and evaluation board - https://patchwork.kernel.org/project/linux-mediatek/patch/20220112114724.1953-4-tinghan.shen@mediatek.com/ -- Hi Angelo, I'm sorry I couldn't find your last reply mail, so I reply you so late. Thanks for the reviews! I have fixed them. Regards, Jason-JH.Lin --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index a363e82f6988..75422c498309 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/clock/mt8195-clk.h> +#include <dt-bindings/gce/mt8195-gce.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/phy/phy.h> @@ -18,6 +19,11 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + gce0 = &gce0; + gce1 = &gce1; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -367,6 +373,22 @@ assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>; }; + gce0: mailbox@10320000 { + compatible = "mediatek,mt8195-gce"; + reg = <0 0x10320000 0 0x4000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <2>; + clocks = <&infracfg_ao CLK_INFRA_AO_GCE>; + }; + + gce1: mailbox@10330000 { + compatible = "mediatek,mt8195-gce"; + reg = <0 0x10330000 0 0x4000>; + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <2>; + clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>; + }; + scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8195-scp_adsp"; reg = <0 0x10720000 0 0x1000>; -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: jason-jh.lin <jason-jh.lin@mediatek.com> To: Rob Herring <robh+dt@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, "Paolo Bonzini" <pbonzini@redhat.com>, Sean Christopherson <seanjc@google.com>, <maciej.szmigiero@oracle.com>, David Matlack <dmatlack@google.com>, "Jing Zhang" <jingzhangos@google.com>, Marc Zyngier <maz@kernel.org>, "Bartosz Golaszewski" <bgolaszewski@baylibre.com>, Sean Wang <sean.wang@mediatek.com>, Tinghan Shen <tinghan.shen@mediatek.com> Cc: <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, <ryder.lee@kernel.org>, <wenst@chromium.org>, <chunfeng.yun@mediatek.com>, Seiya Wang <seiya.wang@mediatek.com>, <moudy.ho@mediatek.com>, <roy-cw.yeh@mediatek.com>, <nancy.lin@mediatek.com>, <singo.chang@mediatek.com>, <Macpaul.Lin@mediatek.com>, jason-jh.lin <jason-jh.lin@mediatek.com> Subject: [PATCH v2] arm64: dts: mt8195: add gce node Date: Fri, 25 Feb 2022 10:02:30 +0800 [thread overview] Message-ID: <20220225020230.24472-1-jason-jh.lin@mediatek.com> (raw) Add gce node and gce alias on mt8195 dts file. Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- This patch is based on [1] [1] arm64: dts: Add mediatek SoC mt8195 and evaluation board - https://patchwork.kernel.org/project/linux-mediatek/patch/20220112114724.1953-4-tinghan.shen@mediatek.com/ -- Hi Angelo, I'm sorry I couldn't find your last reply mail, so I reply you so late. Thanks for the reviews! I have fixed them. Regards, Jason-JH.Lin --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index a363e82f6988..75422c498309 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/clock/mt8195-clk.h> +#include <dt-bindings/gce/mt8195-gce.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/phy/phy.h> @@ -18,6 +19,11 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + gce0 = &gce0; + gce1 = &gce1; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -367,6 +373,22 @@ assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>; }; + gce0: mailbox@10320000 { + compatible = "mediatek,mt8195-gce"; + reg = <0 0x10320000 0 0x4000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <2>; + clocks = <&infracfg_ao CLK_INFRA_AO_GCE>; + }; + + gce1: mailbox@10330000 { + compatible = "mediatek,mt8195-gce"; + reg = <0 0x10330000 0 0x4000>; + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <2>; + clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>; + }; + scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8195-scp_adsp"; reg = <0 0x10720000 0 0x1000>; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2022-02-25 2:06 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-02-25 2:02 jason-jh.lin [this message] 2022-02-25 2:02 ` [PATCH v2] arm64: dts: mt8195: add gce node jason-jh.lin
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