From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: rafael@kernel.org, viresh.kumar@linaro.org, robh+dt@kernel.org,
krzk+dt@kernel.org
Cc: bjorn.andersson@linaro.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
angelogioacchino.delregno@somainline.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Hector Yuan <hector.yuan@mediatek.com>,
Sudeep Holla <sudeep.holla@arm.com>
Subject: [PATCH v2 1/2] dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an example
Date: Wed, 9 Mar 2022 20:45:40 +0530 [thread overview]
Message-ID: <20220309151541.139511-2-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20220309151541.139511-1-manivannan.sadhasivam@linaro.org>
Qcom CPUFREQ HW don't have the support for generic performance domains yet.
So use MediaTek CPUFREQ HW that has the support available in mainline.
This also silences the below dtschema warnings for "cpufreq-qcom-hw.yaml":
Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: reg: [[305397760, 4096]] is too short
From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clocks' is a required property
From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clock-names' is a required property
From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#freq-domain-cells' is a required property
From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#performance-domain-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
Cc: Hector Yuan <hector.yuan@mediatek.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
.../bindings/dvfs/performance-domain.yaml | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/dvfs/performance-domain.yaml b/Documentation/devicetree/bindings/dvfs/performance-domain.yaml
index c8b91207f34d..9e0bcf1a89fe 100644
--- a/Documentation/devicetree/bindings/dvfs/performance-domain.yaml
+++ b/Documentation/devicetree/bindings/dvfs/performance-domain.yaml
@@ -52,10 +52,16 @@ additionalProperties: true
examples:
- |
- performance: performance-controller@12340000 {
- compatible = "qcom,cpufreq-hw";
- reg = <0x12340000 0x1000>;
- #performance-domain-cells = <1>;
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ performance: performance-controller@11bc00 {
+ compatible = "mediatek,cpufreq-hw";
+ reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
+
+ #performance-domain-cells = <1>;
+ };
};
// The node above defines a performance controller that is a performance
--
2.25.1
next prev parent reply other threads:[~2022-03-09 15:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-09 15:15 [PATCH v2 0/2] Convert Qcom CPUFREQ HW binding to YAML Manivannan Sadhasivam
2022-03-09 15:15 ` Manivannan Sadhasivam [this message]
2022-03-09 19:17 ` [PATCH v2 1/2] dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an example Sudeep Holla
2022-03-10 23:13 ` Rob Herring
2022-07-13 14:42 ` Sudeep Holla
2022-03-09 15:15 ` [PATCH v2 2/2] dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings Manivannan Sadhasivam
2022-03-09 16:47 ` Krzysztof Kozlowski
2022-07-13 5:40 ` Viresh Kumar
2022-03-11 3:31 ` [PATCH v2 0/2] Convert Qcom CPUFREQ HW binding to YAML Viresh Kumar
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