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From: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
To: xen-devel@lists.xenproject.org
Cc: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"George Dunlap" <george.dunlap@citrix.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Julien Grall" <julien@xen.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Wei Liu" <wl@xen.org>
Subject: [PATCH 1/2] ns16550: reject IRQ above nr_irqs
Date: Thu, 10 Mar 2022 15:34:02 +0100	[thread overview]
Message-ID: <20220310143403.50944-1-marmarek@invisiblethingslab.com> (raw)

Intel LPSS has INTERRUPT_LINE set to 0xff by default, that can't
possibly work. While a proper IRQ configuration may be useful,
validating value retrieved from the hardware is still necessary. If it
fails, use the device in poll mode.

Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
---
 xen/drivers/char/ns16550.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index e5b4a9085516..2d7c8c11bc69 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1221,6 +1221,9 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt, unsigned int idx)
                             pci_conf_read8(PCI_SBDF(0, b, d, f),
                                            PCI_INTERRUPT_LINE) : 0;
 
+                if (uart->irq >= nr_irqs)
+                    uart->irq = 0;
+
                 return 0;
             }
         }
-- 
2.31.1



             reply	other threads:[~2022-03-10 14:34 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-10 14:34 Marek Marczykowski-Górecki [this message]
2022-03-10 14:34 ` [PATCH 2/2] ns16550: Add support for Intel LPSS UART Marek Marczykowski-Górecki
2022-03-15  9:04   ` Jan Beulich
2022-03-10 15:23 ` [PATCH 1/2] ns16550: reject IRQ above nr_irqs Jan Beulich
2022-03-10 15:47   ` Roger Pau Monné
2022-03-10 16:08     ` Jan Beulich
2022-03-10 16:12       ` Roger Pau Monné
2022-03-10 16:21         ` Julien Grall
2022-03-10 16:34           ` Jan Beulich
2022-03-10 16:37           ` Marek Marczykowski-Górecki
2022-03-11 10:23             ` Julien Grall
2022-03-11 10:52               ` Marek Marczykowski-Górecki
2022-03-11 11:15                 ` Julien Grall
2022-03-11 15:04                   ` Roger Pau Monné
2022-03-11 15:19                     ` Julien Grall
2022-03-11 15:43                       ` Roger Pau Monné
2022-03-11 16:32                         ` Marek Marczykowski-Górecki
2022-03-15 10:02                           ` Roger Pau Monné

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