From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Andre Przywara <andre.przywara@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Eric Auger <eric.auger@redhat.com>,
stable@vger.kernel.org
Subject: [PATCH 1/3] irqchip/gic-v3: Fix GICR_CTLR.RWP polling
Date: Tue, 15 Mar 2022 16:50:32 +0000 [thread overview]
Message-ID: <20220315165034.794482-2-maz@kernel.org> (raw)
In-Reply-To: <20220315165034.794482-1-maz@kernel.org>
It turns out that our polling of RWP is totally wrong when checking
for it in the redistributors, as we test the *distributor* bit index,
whereas it is a different bit number in the RDs... Oopsie boo.
This is embarassing. Not only because it is wrong, but also because
it took *8 years* to notice the blunder...
Just fix the damn thing.
Fixes: 021f653791ad ("irqchip: gic-v3: Initial support for GICv3")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
---
drivers/irqchip/irq-gic-v3.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 5e935d97207d..736163d36b13 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -206,11 +206,11 @@ static inline void __iomem *gic_dist_base(struct irq_data *d)
}
}
-static void gic_do_wait_for_rwp(void __iomem *base)
+static void gic_do_wait_for_rwp(void __iomem *base, u32 bit)
{
u32 count = 1000000; /* 1s! */
- while (readl_relaxed(base + GICD_CTLR) & GICD_CTLR_RWP) {
+ while (readl_relaxed(base + GICD_CTLR) & bit) {
count--;
if (!count) {
pr_err_ratelimited("RWP timeout, gone fishing\n");
@@ -224,13 +224,13 @@ static void gic_do_wait_for_rwp(void __iomem *base)
/* Wait for completion of a distributor change */
static void gic_dist_wait_for_rwp(void)
{
- gic_do_wait_for_rwp(gic_data.dist_base);
+ gic_do_wait_for_rwp(gic_data.dist_base, GICD_CTLR_RWP);
}
/* Wait for completion of a redistributor change */
static void gic_redist_wait_for_rwp(void)
{
- gic_do_wait_for_rwp(gic_data_rdist_rd_base());
+ gic_do_wait_for_rwp(gic_data_rdist_rd_base(), GICR_CTLR_RWP);
}
#ifdef CONFIG_ARM64
--
2.34.1
next prev parent reply other threads:[~2022-03-15 16:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-15 16:50 [PATCH 0/3] irqchip/gic-v3: Assorted fixes and improvements Marc Zyngier
2022-03-15 16:50 ` Marc Zyngier [this message]
2022-03-16 14:51 ` [PATCH 1/3] irqchip/gic-v3: Fix GICR_CTLR.RWP polling Andre Przywara
2022-03-16 15:19 ` Marc Zyngier
2022-03-17 17:03 ` Lorenzo Pieralisi
2022-03-21 9:19 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2022-03-21 14:07 ` irqchip-bot for Marc Zyngier
2022-04-05 15:39 ` [irqchip: irq/irqchip-fixes] " irqchip-bot for Marc Zyngier
2022-03-15 16:50 ` [PATCH 2/3] irqchip/gic-v3: Detect LPI invalidation MMIO registers Marc Zyngier
2022-03-16 11:21 ` Marc Zyngier
2022-03-16 14:51 ` Andre Przywara
2022-03-16 15:36 ` Marc Zyngier
2022-03-16 15:52 ` Andre Przywara
2022-03-17 17:35 ` Lorenzo Pieralisi
2022-03-21 9:31 ` Marc Zyngier
2022-03-15 16:50 ` [PATCH 3/3] irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP Marc Zyngier
2022-03-16 14:54 ` Andre Przywara
2022-03-16 15:42 ` Marc Zyngier
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