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From: Anusha Srivatsa <anusha.srivatsa@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
Date: Tue, 15 Mar 2022 12:47:11 -0700	[thread overview]
Message-ID: <20220315194712.2113450-4-anusha.srivatsa@intel.com> (raw)
In-Reply-To: <20220315194712.2113450-1-anusha.srivatsa@intel.com>

Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 1f879af15d87..3007710984d4 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1951,9 +1951,9 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
 		skl_cdclk_uninit_hw(i915);
 }
 
-static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
-				  const struct intel_cdclk_config *a,
-				  const struct intel_cdclk_config *b)
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+				  const struct intel_cdclk_state *a,
+				  struct intel_cdclk_state *b)
 {
 	int a_div, b_div;
 
@@ -1964,13 +1964,13 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 	 * The vco and cd2x divider will change independently
 	 * from each, so we disallow cd2x change when crawling.
 	 */
-	a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
-	b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+	a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
+	b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
 
-	return a->vco != 0 && b->vco != 0 &&
-		a->vco != b->vco &&
+	return a->actual.vco != 0 && b->actual.vco != 0 &&
+		a->actual.vco != b->actual.vco &&
 		a_div == b_div &&
-		a->ref == b->ref;
+		a->actual.ref == b->actual.ref;
 }
 
 static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
@@ -2782,9 +2782,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			       new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
-	} else if (intel_cdclk_can_crawl(dev_priv,
-					 &old_cdclk_state->actual,
-					 &new_cdclk_state->actual)) {
+	} else if (intel_cdclk_crawl(dev_priv,
+				     old_cdclk_state,
+				     new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via crawl\n");
 	} else if (pipe != INVALID_PIPE) {
-- 
2.25.1


  parent reply	other threads:[~2022-03-15 19:50 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-15 19:47 [Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase Anusha Srivatsa
2022-03-15 19:47 ` [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state Anusha Srivatsa
2022-03-15 19:47 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash Anusha Srivatsa
2022-03-15 19:47 ` Anusha Srivatsa [this message]
2022-03-15 19:47 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Add cdclk checks to atomic check Anusha Srivatsa
2022-03-25  8:06   ` [Intel-gfx] [drm/i915/display] 0936eaf045: canonical_address#:#[##] kernel test robot
2022-03-25  8:06     ` kernel test robot
2022-03-25  8:06     ` kernel test robot
2022-03-15 20:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add CDCLK checks to atomic check phase (rev4) Patchwork
2022-03-15 20:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-15 21:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-18 17:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add CDCLK checks to atomic check phase (rev5) Patchwork
2022-03-18 17:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-18 17:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-08-20  0:58 [Intel-gfx] [PATCH 0/4] CDCLK churn: move checks to atomic check Anusha Srivatsa
2022-08-20  0:58 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl Anusha Srivatsa
2022-07-27 23:26 [Intel-gfx] [PATCH 0/4] Move CDCLK checks to atomic check phase Anusha Srivatsa
2022-07-27 23:26 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl Anusha Srivatsa
2022-03-11  7:04 [Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase Anusha Srivatsa
2022-03-11  7:04 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl Anusha Srivatsa

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