From: Mario Limonciello via iommu <iommu@lists.linux-foundation.org> To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org> Cc: Hegde Vasant <Vasant.Hegde@amd.com>, open list <linux-kernel@vger.kernel.org>, Christoph Hellwig <hch@infradead.org>, "open list:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>, Mario Limonciello <mario.limonciello@amd.com>, Robin Murphy <robin.murphy@arm.com> Subject: [PATCH v2 1/2] iommu/amd: Enable swiotlb in all cases Date: Mon, 4 Apr 2022 15:47:22 -0500 [thread overview] Message-ID: <20220404204723.9767-2-mario.limonciello@amd.com> (raw) In-Reply-To: <20220404204723.9767-1-mario.limonciello@amd.com> Previously the AMD IOMMU would only enable SWIOTLB in certain circumstances: * IOMMU in passthrough mode * SME enabled This logic however doesn't work when an untrusted device is plugged in that doesn't do page aligned DMA transactions. The expectation is that a bounce buffer is used for those transactions. This fails like this: swiotlb buffer is full (sz: 4096 bytes), total 0 (slots), used 0 (slots) That happens because the bounce buffers have been allocated, followed by freed during startup but the bounce buffering code expects that all IOMMUs have left it enabled. Remove the criteria to set up bounce buffers on AMD systems to ensure they're always available for supporting untrusted devices. Fixes: 82612d66d51d ("iommu: Allow the dma-iommu api to use bounce buffers") Suggested-by: Christoph Hellwig <hch@infradead.org> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- v1->v2: * Enable swiotlb for AMD instead of ignoring it for inactive drivers/iommu/amd/iommu.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index a1ada7bff44e..079694f894b8 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1838,17 +1838,10 @@ void amd_iommu_domain_update(struct protection_domain *domain) amd_iommu_domain_flush_complete(domain); } -static void __init amd_iommu_init_dma_ops(void) -{ - swiotlb = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0; -} - int __init amd_iommu_init_api(void) { int err; - amd_iommu_init_dma_ops(); - err = bus_set_iommu(&pci_bus_type, &amd_iommu_ops); if (err) return err; -- 2.34.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Mario Limonciello <mario.limonciello@amd.com> To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org> Cc: Christoph Hellwig <hch@infradead.org>, Marek Szyprowski <m.szyprowski@samsung.com>, Robin Murphy <robin.murphy@arm.com>, "open list:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>, Suthikulpanit Suravee <Suravee.Suthikulpanit@amd.com>, Hegde Vasant <Vasant.Hegde@amd.com>, "open list" <linux-kernel@vger.kernel.org>, Mario Limonciello <mario.limonciello@amd.com> Subject: [PATCH v2 1/2] iommu/amd: Enable swiotlb in all cases Date: Mon, 4 Apr 2022 15:47:22 -0500 [thread overview] Message-ID: <20220404204723.9767-2-mario.limonciello@amd.com> (raw) In-Reply-To: <20220404204723.9767-1-mario.limonciello@amd.com> Previously the AMD IOMMU would only enable SWIOTLB in certain circumstances: * IOMMU in passthrough mode * SME enabled This logic however doesn't work when an untrusted device is plugged in that doesn't do page aligned DMA transactions. The expectation is that a bounce buffer is used for those transactions. This fails like this: swiotlb buffer is full (sz: 4096 bytes), total 0 (slots), used 0 (slots) That happens because the bounce buffers have been allocated, followed by freed during startup but the bounce buffering code expects that all IOMMUs have left it enabled. Remove the criteria to set up bounce buffers on AMD systems to ensure they're always available for supporting untrusted devices. Fixes: 82612d66d51d ("iommu: Allow the dma-iommu api to use bounce buffers") Suggested-by: Christoph Hellwig <hch@infradead.org> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- v1->v2: * Enable swiotlb for AMD instead of ignoring it for inactive drivers/iommu/amd/iommu.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index a1ada7bff44e..079694f894b8 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1838,17 +1838,10 @@ void amd_iommu_domain_update(struct protection_domain *domain) amd_iommu_domain_flush_complete(domain); } -static void __init amd_iommu_init_dma_ops(void) -{ - swiotlb = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0; -} - int __init amd_iommu_init_api(void) { int err; - amd_iommu_init_dma_ops(); - err = bus_set_iommu(&pci_bus_type, &amd_iommu_ops); if (err) return err; -- 2.34.1
next prev parent reply other threads:[~2022-04-04 20:47 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-04 20:47 [PATCH v2 0/2] Fix issues with untrusted devices and AMD IOMMU Mario Limonciello via iommu 2022-04-04 20:47 ` Mario Limonciello 2022-04-04 20:47 ` Mario Limonciello via iommu [this message] 2022-04-04 20:47 ` [PATCH v2 1/2] iommu/amd: Enable swiotlb in all cases Mario Limonciello 2022-04-05 4:34 ` Christoph Hellwig 2022-04-05 4:34 ` Christoph Hellwig 2022-04-06 17:04 ` Limonciello, Mario via iommu 2022-04-06 17:04 ` Limonciello, Mario 2022-04-07 7:58 ` Christoph Hellwig 2022-04-07 7:58 ` Christoph Hellwig 2022-04-21 14:44 ` Limonciello, Mario 2022-04-21 14:44 ` Limonciello, Mario via iommu 2022-04-07 13:31 ` Robin Murphy 2022-04-07 13:31 ` Robin Murphy 2022-04-07 13:41 ` Christoph Hellwig 2022-04-07 13:41 ` Christoph Hellwig 2022-04-04 20:47 ` [PATCH v2 2/2] dma-iommu: Check that swiotlb is active before trying to use it Mario Limonciello via iommu 2022-04-04 20:47 ` Mario Limonciello 2022-04-05 4:34 ` Christoph Hellwig 2022-04-05 4:34 ` Christoph Hellwig 2022-04-07 13:07 ` Robin Murphy 2022-04-07 13:07 ` Robin Murphy 2022-04-28 8:27 ` [PATCH v2 0/2] Fix issues with untrusted devices and AMD IOMMU Joerg Roedel 2022-04-28 8:27 ` Joerg Roedel
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