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From: Yong Wu via iommu <iommu@lists.linux-foundation.org>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>
Cc: devicetree@vger.kernel.org, srv_heupstream@mediatek.com,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	chengci.xu@mediatek.com, xueqi.zhang@mediatek.com,
	linux-kernel@vger.kernel.org, libo.kang@mediatek.com,
	yen-chang.chen@mediatek.com, iommu@lists.linux-foundation.org,
	yf.wang@mediatek.com, linux-mediatek@lists.infradead.org,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	anan.sun@mediatek.com, Robin Murphy <robin.murphy@arm.com>,
	mingyuan.ma@mediatek.com, linux-arm-kernel@lists.infradead.org,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Subject: [PATCH v6 22/34] iommu/mediatek: Add mt8195 support
Date: Thu, 7 Apr 2022 15:57:14 +0800	[thread overview]
Message-ID: <20220407075726.17771-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20220407075726.17771-1-yong.wu@mediatek.com>

mt8195 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/iommu/mtk_iommu.c | 43 +++++++++++++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 44 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 763e912d0a67..7a8d9dda7361 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1234,6 +1234,46 @@ static const struct mtk_iommu_plat_data mt8192_data = {
 			   {0, 14, 16}, {0, 13, 18, 17}},
 };
 
+static const struct mtk_iommu_plat_data mt8195_data_infra = {
+	.m4u_plat	  = M4U_MT8195,
+	.flags            = WR_THROT_EN | DCM_DISABLE | PM_CLK_AO |
+			    MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,
+	.pericfg_comp_str = "mediatek,mt8195-pericfg_ao",
+	.inv_sel_reg      = REG_MMU_INV_SEL_GEN2,
+	.iova_region      = single_domain,
+	.iova_region_nr   = ARRAY_SIZE(single_domain),
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vdo = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},
+			   {13, 17, 15/* 17b */, 25}, {5}},
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vpp = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{1}, {3},
+			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},
+			   {8}, {20}, {12},
+			   /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */
+			   {14, 16, 29, 26, 30, 31, 18},
+			   {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
+};
+
 static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
 	{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1241,6 +1281,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
 	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
 	{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
+	{ .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
+	{ .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},
+	{ .compatible = "mediatek,mt8195-iommu-vpp",   .data = &mt8195_data_vpp},
 	{}
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 56838fad8c73..f2ee11cd254a 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -46,6 +46,7 @@ enum mtk_iommu_plat {
 	M4U_MT8173,
 	M4U_MT8183,
 	M4U_MT8192,
+	M4U_MT8195,
 };
 
 struct mtk_iommu_iova_region;
-- 
2.18.0

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>, <anan.sun@mediatek.com>,
	<xueqi.zhang@mediatek.com>, <yen-chang.chen@mediatek.com>,
	"AngeloGioacchino Del Regno" 
	<angelogioacchino.delregno@collabora.com>,
	<mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>,
	<libo.kang@mediatek.com>, <chengci.xu@mediatek.com>
Subject: [PATCH v6 22/34] iommu/mediatek: Add mt8195 support
Date: Thu, 7 Apr 2022 15:57:14 +0800	[thread overview]
Message-ID: <20220407075726.17771-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20220407075726.17771-1-yong.wu@mediatek.com>

mt8195 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/iommu/mtk_iommu.c | 43 +++++++++++++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 44 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 763e912d0a67..7a8d9dda7361 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1234,6 +1234,46 @@ static const struct mtk_iommu_plat_data mt8192_data = {
 			   {0, 14, 16}, {0, 13, 18, 17}},
 };
 
+static const struct mtk_iommu_plat_data mt8195_data_infra = {
+	.m4u_plat	  = M4U_MT8195,
+	.flags            = WR_THROT_EN | DCM_DISABLE | PM_CLK_AO |
+			    MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,
+	.pericfg_comp_str = "mediatek,mt8195-pericfg_ao",
+	.inv_sel_reg      = REG_MMU_INV_SEL_GEN2,
+	.iova_region      = single_domain,
+	.iova_region_nr   = ARRAY_SIZE(single_domain),
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vdo = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},
+			   {13, 17, 15/* 17b */, 25}, {5}},
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vpp = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{1}, {3},
+			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},
+			   {8}, {20}, {12},
+			   /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */
+			   {14, 16, 29, 26, 30, 31, 18},
+			   {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
+};
+
 static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
 	{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1241,6 +1281,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
 	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
 	{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
+	{ .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
+	{ .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},
+	{ .compatible = "mediatek,mt8195-iommu-vpp",   .data = &mt8195_data_vpp},
 	{}
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 56838fad8c73..f2ee11cd254a 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -46,6 +46,7 @@ enum mtk_iommu_plat {
 	M4U_MT8173,
 	M4U_MT8183,
 	M4U_MT8192,
+	M4U_MT8195,
 };
 
 struct mtk_iommu_iova_region;
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>, <anan.sun@mediatek.com>,
	<xueqi.zhang@mediatek.com>, <yen-chang.chen@mediatek.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	<mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>,
	<libo.kang@mediatek.com>,  <chengci.xu@mediatek.com>
Subject: [PATCH v6 22/34] iommu/mediatek: Add mt8195 support
Date: Thu, 7 Apr 2022 15:57:14 +0800	[thread overview]
Message-ID: <20220407075726.17771-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20220407075726.17771-1-yong.wu@mediatek.com>

mt8195 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/iommu/mtk_iommu.c | 43 +++++++++++++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 44 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 763e912d0a67..7a8d9dda7361 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1234,6 +1234,46 @@ static const struct mtk_iommu_plat_data mt8192_data = {
 			   {0, 14, 16}, {0, 13, 18, 17}},
 };
 
+static const struct mtk_iommu_plat_data mt8195_data_infra = {
+	.m4u_plat	  = M4U_MT8195,
+	.flags            = WR_THROT_EN | DCM_DISABLE | PM_CLK_AO |
+			    MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,
+	.pericfg_comp_str = "mediatek,mt8195-pericfg_ao",
+	.inv_sel_reg      = REG_MMU_INV_SEL_GEN2,
+	.iova_region      = single_domain,
+	.iova_region_nr   = ARRAY_SIZE(single_domain),
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vdo = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},
+			   {13, 17, 15/* 17b */, 25}, {5}},
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vpp = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{1}, {3},
+			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},
+			   {8}, {20}, {12},
+			   /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */
+			   {14, 16, 29, 26, 30, 31, 18},
+			   {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
+};
+
 static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
 	{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1241,6 +1281,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
 	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
 	{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
+	{ .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
+	{ .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},
+	{ .compatible = "mediatek,mt8195-iommu-vpp",   .data = &mt8195_data_vpp},
 	{}
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 56838fad8c73..f2ee11cd254a 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -46,6 +46,7 @@ enum mtk_iommu_plat {
 	M4U_MT8173,
 	M4U_MT8183,
 	M4U_MT8192,
+	M4U_MT8195,
 };
 
 struct mtk_iommu_iova_region;
-- 
2.18.0


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>,
	Hsin-Yi Wang <hsinyi@chromium.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>, <anan.sun@mediatek.com>,
	<xueqi.zhang@mediatek.com>, <yen-chang.chen@mediatek.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	<mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>,
	<libo.kang@mediatek.com>,  <chengci.xu@mediatek.com>
Subject: [PATCH v6 22/34] iommu/mediatek: Add mt8195 support
Date: Thu, 7 Apr 2022 15:57:14 +0800	[thread overview]
Message-ID: <20220407075726.17771-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20220407075726.17771-1-yong.wu@mediatek.com>

mt8195 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/iommu/mtk_iommu.c | 43 +++++++++++++++++++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 44 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 763e912d0a67..7a8d9dda7361 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1234,6 +1234,46 @@ static const struct mtk_iommu_plat_data mt8192_data = {
 			   {0, 14, 16}, {0, 13, 18, 17}},
 };
 
+static const struct mtk_iommu_plat_data mt8195_data_infra = {
+	.m4u_plat	  = M4U_MT8195,
+	.flags            = WR_THROT_EN | DCM_DISABLE | PM_CLK_AO |
+			    MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,
+	.pericfg_comp_str = "mediatek,mt8195-pericfg_ao",
+	.inv_sel_reg      = REG_MMU_INV_SEL_GEN2,
+	.iova_region      = single_domain,
+	.iova_region_nr   = ARRAY_SIZE(single_domain),
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vdo = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},
+			   {13, 17, 15/* 17b */, 25}, {5}},
+};
+
+static const struct mtk_iommu_plat_data mt8195_data_vpp = {
+	.m4u_plat	= M4U_MT8195,
+	.flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+			  WR_THROT_EN | NOT_STD_AXI_MODE | IOVA_34_EN |
+			  SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
+	.hw_list        = &m4ulist,
+	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+	.iova_region	= mt8192_multi_dom,
+	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),
+	.larbid_remap   = {{1}, {3},
+			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},
+			   {8}, {20}, {12},
+			   /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */
+			   {14, 16, 29, 26, 30, 31, 18},
+			   {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
+};
+
 static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
 	{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1241,6 +1281,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
 	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
 	{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
+	{ .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
+	{ .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},
+	{ .compatible = "mediatek,mt8195-iommu-vpp",   .data = &mt8195_data_vpp},
 	{}
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 56838fad8c73..f2ee11cd254a 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -46,6 +46,7 @@ enum mtk_iommu_plat {
 	M4U_MT8173,
 	M4U_MT8183,
 	M4U_MT8192,
+	M4U_MT8195,
 };
 
 struct mtk_iommu_iova_region;
-- 
2.18.0


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  parent reply	other threads:[~2022-04-07  8:01 UTC|newest]

Thread overview: 160+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-07  7:56 [PATCH v6 00/34] MT8195 IOMMU SUPPORT Yong Wu
2022-04-07  7:56 ` Yong Wu
2022-04-07  7:56 ` Yong Wu
2022-04-07  7:56 ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 01/34] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 02/34] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 03/34] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 04/34] iommu/mediatek: Add list_del in mtk_iommu_remove Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 05/34] iommu/mediatek: Remove clk_disable " Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 06/34] iommu/mediatek: Add mutex for m4u_group and m4u_dom in data Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu via iommu
2022-04-07  7:56 ` [PATCH v6 07/34] iommu/mediatek: Add mutex for data in the mtk_iommu_domain Yong Wu via iommu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:56   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 08/34] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 09/34] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 10/34] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 11/34] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-28 14:52   ` Matthias Brugger
2022-04-28 14:52     ` Matthias Brugger
2022-04-28 14:52     ` Matthias Brugger
2022-04-28 14:52     ` Matthias Brugger
2022-04-07  7:57 ` [PATCH v6 12/34] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 13/34] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 14/34] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 15/34] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-28 14:17   ` Matthias Brugger
2022-04-28 14:17     ` Matthias Brugger
2022-04-28 14:17     ` Matthias Brugger
2022-04-28 14:17     ` Matthias Brugger
2022-04-07  7:57 ` [PATCH v6 16/34] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 17/34] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 18/34] iommu/mediatek: Allow IOMMU_DOMAIN_UNMANAGED for PCIe VFIO Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 19/34] iommu/mediatek: Add a PM_CLK_AO flag for infra iommu Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 20/34] iommu/mediatek: Add infra iommu support Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 21/34] iommu/mediatek: Add PCIe support Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` Yong Wu via iommu [this message]
2022-04-07  7:57   ` [PATCH v6 22/34] iommu/mediatek: Add mt8195 support Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 23/34] iommu/mediatek: Only adjust code about register base Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 24/34] iommu/mediatek: Just move code position in hw_init Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 25/34] iommu/mediatek: Separate mtk_iommu_data for v1 and v2 Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 26/34] iommu/mediatek: Remove mtk_iommu.h Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 27/34] iommu/mediatek-v1: Just rename mtk_iommu to mtk_iommu_v1 Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 28/34] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 29/34] iommu/mediatek: Initialise bank HW for each a bank Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 30/34] iommu/mediatek: Change the domid to iova_region_id Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 31/34] iommu/mediatek: Get the proper bankid for multi banks Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-28 14:14   ` Matthias Brugger
2022-04-28 14:14     ` Matthias Brugger
2022-04-28 14:14     ` Matthias Brugger
2022-04-28 14:14     ` Matthias Brugger
2022-05-01  2:33     ` Yong Wu
2022-05-01  2:33       ` Yong Wu
2022-05-01  2:33       ` Yong Wu
2022-05-01  2:33       ` Yong Wu via iommu
2022-04-07  7:57 ` [PATCH v6 32/34] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 33/34] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57 ` [PATCH v6 34/34] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu via iommu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-07  7:57   ` Yong Wu
2022-04-19  9:00 ` [PATCH v6 00/34] MT8195 IOMMU SUPPORT AngeloGioacchino Del Regno
2022-04-19  9:00   ` AngeloGioacchino Del Regno
2022-04-19  9:00   ` AngeloGioacchino Del Regno
2022-04-19  9:00   ` AngeloGioacchino Del Regno

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