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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
	<robh+dt@kernel.org>, <krzk+dt@kernel.org>
Cc: <matthias.bgg@gmail.com>, <jia-wei.chang@mediatek.com>,
	<roger.lu@mediatek.com>, <hsinyi@google.com>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"Andrew-sh . Cheng" <andrew-sh.cheng@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH V2 05/15] cpufreq: mediatek: Enable clocks and regulators
Date: Fri, 8 Apr 2022 12:58:58 +0800	[thread overview]
Message-ID: <20220408045908.21671-6-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220408045908.21671-1-rex-bc.chen@mediatek.com>

From: Jia-Wei Chang <jia-wei.chang@mediatek.com>

We need to enable regulators so that the max and min requested values will
be recorded.
The intermediate clock is not always enabled by CCF in different projects,
so we should enable it in the cpufreq driver.

Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 drivers/cpufreq/mediatek-cpufreq.c | 50 +++++++++++++++++++++++++++---
 1 file changed, 45 insertions(+), 5 deletions(-)

diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index 2a2859dbc5e0..dc4a87e68940 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -332,10 +332,23 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 		goto out_free_resources;
 	}
 
+	ret = regulator_enable(info->proc_reg);
+	if (ret) {
+		dev_warn(cpu_dev, "cpu%d: failed to enable vproc\n", cpu);
+		goto out_free_resources;
+	}
+
 	/* Both presence and absence of sram regulator are valid cases. */
 	info->sram_reg = regulator_get_exclusive(cpu_dev, "sram");
 	if (IS_ERR(info->sram_reg))
 		info->sram_reg = NULL;
+	else {
+		ret = regulator_enable(info->sram_reg);
+		if (ret) {
+			dev_warn(cpu_dev, "cpu%d: failed to enable vsram\n", cpu);
+			goto out_free_resources;
+		}
+	}
 
 	/* Get OPP-sharing information from "operating-points-v2" bindings */
 	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus);
@@ -351,13 +364,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 		goto out_free_resources;
 	}
 
+	ret = clk_prepare_enable(info->cpu_clk);
+	if (ret)
+		goto out_free_opp_table;
+
+	ret = clk_prepare_enable(info->inter_clk);
+	if (ret)
+		goto out_disable_mux_clock;
+
 	/* Search a safe voltage for intermediate frequency. */
 	rate = clk_get_rate(info->inter_clk);
 	opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
 	if (IS_ERR(opp)) {
 		dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu);
 		ret = PTR_ERR(opp);
-		goto out_free_opp_table;
+		goto out_disable_inter_clock;
 	}
 	info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
 	dev_pm_opp_put(opp);
@@ -370,10 +391,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 
 	return 0;
 
+out_disable_inter_clock:
+	clk_disable_unprepare(info->inter_clk);
+
+out_disable_mux_clock:
+	clk_disable_unprepare(info->cpu_clk);
+
 out_free_opp_table:
 	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 
 out_free_resources:
+	if (regulator_is_enabled(info->proc_reg))
+		regulator_disable(info->proc_reg);
+	if (info->sram_reg && regulator_is_enabled(info->sram_reg))
+		regulator_disable(info->sram_reg);
+
 	if (!IS_ERR(info->proc_reg))
 		regulator_put(info->proc_reg);
 	if (!IS_ERR(info->sram_reg))
@@ -388,14 +420,22 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 
 static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
 {
-	if (!IS_ERR(info->proc_reg))
+	if (!IS_ERR(info->proc_reg)) {
+		regulator_disable(info->proc_reg);
 		regulator_put(info->proc_reg);
-	if (!IS_ERR(info->sram_reg))
+	}
+	if (!IS_ERR(info->sram_reg)) {
+		regulator_disable(info->sram_reg);
 		regulator_put(info->sram_reg);
-	if (!IS_ERR(info->cpu_clk))
+	}
+	if (!IS_ERR(info->cpu_clk)) {
+		clk_disable_unprepare(info->cpu_clk);
 		clk_put(info->cpu_clk);
-	if (!IS_ERR(info->inter_clk))
+	}
+	if (!IS_ERR(info->inter_clk)) {
+		clk_disable_unprepare(info->inter_clk);
 		clk_put(info->inter_clk);
+	}
 
 	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 }
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
	<robh+dt@kernel.org>, <krzk+dt@kernel.org>
Cc: <matthias.bgg@gmail.com>, <jia-wei.chang@mediatek.com>,
	<roger.lu@mediatek.com>, <hsinyi@google.com>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"Andrew-sh . Cheng" <andrew-sh.cheng@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH V2 05/15] cpufreq: mediatek: Enable clocks and regulators
Date: Fri, 8 Apr 2022 12:58:58 +0800	[thread overview]
Message-ID: <20220408045908.21671-6-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220408045908.21671-1-rex-bc.chen@mediatek.com>

From: Jia-Wei Chang <jia-wei.chang@mediatek.com>

We need to enable regulators so that the max and min requested values will
be recorded.
The intermediate clock is not always enabled by CCF in different projects,
so we should enable it in the cpufreq driver.

Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 drivers/cpufreq/mediatek-cpufreq.c | 50 +++++++++++++++++++++++++++---
 1 file changed, 45 insertions(+), 5 deletions(-)

diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index 2a2859dbc5e0..dc4a87e68940 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -332,10 +332,23 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 		goto out_free_resources;
 	}
 
+	ret = regulator_enable(info->proc_reg);
+	if (ret) {
+		dev_warn(cpu_dev, "cpu%d: failed to enable vproc\n", cpu);
+		goto out_free_resources;
+	}
+
 	/* Both presence and absence of sram regulator are valid cases. */
 	info->sram_reg = regulator_get_exclusive(cpu_dev, "sram");
 	if (IS_ERR(info->sram_reg))
 		info->sram_reg = NULL;
+	else {
+		ret = regulator_enable(info->sram_reg);
+		if (ret) {
+			dev_warn(cpu_dev, "cpu%d: failed to enable vsram\n", cpu);
+			goto out_free_resources;
+		}
+	}
 
 	/* Get OPP-sharing information from "operating-points-v2" bindings */
 	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus);
@@ -351,13 +364,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 		goto out_free_resources;
 	}
 
+	ret = clk_prepare_enable(info->cpu_clk);
+	if (ret)
+		goto out_free_opp_table;
+
+	ret = clk_prepare_enable(info->inter_clk);
+	if (ret)
+		goto out_disable_mux_clock;
+
 	/* Search a safe voltage for intermediate frequency. */
 	rate = clk_get_rate(info->inter_clk);
 	opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
 	if (IS_ERR(opp)) {
 		dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu);
 		ret = PTR_ERR(opp);
-		goto out_free_opp_table;
+		goto out_disable_inter_clock;
 	}
 	info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
 	dev_pm_opp_put(opp);
@@ -370,10 +391,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 
 	return 0;
 
+out_disable_inter_clock:
+	clk_disable_unprepare(info->inter_clk);
+
+out_disable_mux_clock:
+	clk_disable_unprepare(info->cpu_clk);
+
 out_free_opp_table:
 	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 
 out_free_resources:
+	if (regulator_is_enabled(info->proc_reg))
+		regulator_disable(info->proc_reg);
+	if (info->sram_reg && regulator_is_enabled(info->sram_reg))
+		regulator_disable(info->sram_reg);
+
 	if (!IS_ERR(info->proc_reg))
 		regulator_put(info->proc_reg);
 	if (!IS_ERR(info->sram_reg))
@@ -388,14 +420,22 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 
 static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
 {
-	if (!IS_ERR(info->proc_reg))
+	if (!IS_ERR(info->proc_reg)) {
+		regulator_disable(info->proc_reg);
 		regulator_put(info->proc_reg);
-	if (!IS_ERR(info->sram_reg))
+	}
+	if (!IS_ERR(info->sram_reg)) {
+		regulator_disable(info->sram_reg);
 		regulator_put(info->sram_reg);
-	if (!IS_ERR(info->cpu_clk))
+	}
+	if (!IS_ERR(info->cpu_clk)) {
+		clk_disable_unprepare(info->cpu_clk);
 		clk_put(info->cpu_clk);
-	if (!IS_ERR(info->inter_clk))
+	}
+	if (!IS_ERR(info->inter_clk)) {
+		clk_disable_unprepare(info->inter_clk);
 		clk_put(info->inter_clk);
+	}
 
 	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 }
-- 
2.18.0


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>,
	<robh+dt@kernel.org>, <krzk+dt@kernel.org>
Cc: <matthias.bgg@gmail.com>, <jia-wei.chang@mediatek.com>,
	<roger.lu@mediatek.com>, <hsinyi@google.com>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"Andrew-sh . Cheng" <andrew-sh.cheng@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [PATCH V2 05/15] cpufreq: mediatek: Enable clocks and regulators
Date: Fri, 8 Apr 2022 12:58:58 +0800	[thread overview]
Message-ID: <20220408045908.21671-6-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220408045908.21671-1-rex-bc.chen@mediatek.com>

From: Jia-Wei Chang <jia-wei.chang@mediatek.com>

We need to enable regulators so that the max and min requested values will
be recorded.
The intermediate clock is not always enabled by CCF in different projects,
so we should enable it in the cpufreq driver.

Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 drivers/cpufreq/mediatek-cpufreq.c | 50 +++++++++++++++++++++++++++---
 1 file changed, 45 insertions(+), 5 deletions(-)

diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index 2a2859dbc5e0..dc4a87e68940 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -332,10 +332,23 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 		goto out_free_resources;
 	}
 
+	ret = regulator_enable(info->proc_reg);
+	if (ret) {
+		dev_warn(cpu_dev, "cpu%d: failed to enable vproc\n", cpu);
+		goto out_free_resources;
+	}
+
 	/* Both presence and absence of sram regulator are valid cases. */
 	info->sram_reg = regulator_get_exclusive(cpu_dev, "sram");
 	if (IS_ERR(info->sram_reg))
 		info->sram_reg = NULL;
+	else {
+		ret = regulator_enable(info->sram_reg);
+		if (ret) {
+			dev_warn(cpu_dev, "cpu%d: failed to enable vsram\n", cpu);
+			goto out_free_resources;
+		}
+	}
 
 	/* Get OPP-sharing information from "operating-points-v2" bindings */
 	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus);
@@ -351,13 +364,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 		goto out_free_resources;
 	}
 
+	ret = clk_prepare_enable(info->cpu_clk);
+	if (ret)
+		goto out_free_opp_table;
+
+	ret = clk_prepare_enable(info->inter_clk);
+	if (ret)
+		goto out_disable_mux_clock;
+
 	/* Search a safe voltage for intermediate frequency. */
 	rate = clk_get_rate(info->inter_clk);
 	opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
 	if (IS_ERR(opp)) {
 		dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu);
 		ret = PTR_ERR(opp);
-		goto out_free_opp_table;
+		goto out_disable_inter_clock;
 	}
 	info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
 	dev_pm_opp_put(opp);
@@ -370,10 +391,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 
 	return 0;
 
+out_disable_inter_clock:
+	clk_disable_unprepare(info->inter_clk);
+
+out_disable_mux_clock:
+	clk_disable_unprepare(info->cpu_clk);
+
 out_free_opp_table:
 	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 
 out_free_resources:
+	if (regulator_is_enabled(info->proc_reg))
+		regulator_disable(info->proc_reg);
+	if (info->sram_reg && regulator_is_enabled(info->sram_reg))
+		regulator_disable(info->sram_reg);
+
 	if (!IS_ERR(info->proc_reg))
 		regulator_put(info->proc_reg);
 	if (!IS_ERR(info->sram_reg))
@@ -388,14 +420,22 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 
 static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
 {
-	if (!IS_ERR(info->proc_reg))
+	if (!IS_ERR(info->proc_reg)) {
+		regulator_disable(info->proc_reg);
 		regulator_put(info->proc_reg);
-	if (!IS_ERR(info->sram_reg))
+	}
+	if (!IS_ERR(info->sram_reg)) {
+		regulator_disable(info->sram_reg);
 		regulator_put(info->sram_reg);
-	if (!IS_ERR(info->cpu_clk))
+	}
+	if (!IS_ERR(info->cpu_clk)) {
+		clk_disable_unprepare(info->cpu_clk);
 		clk_put(info->cpu_clk);
-	if (!IS_ERR(info->inter_clk))
+	}
+	if (!IS_ERR(info->inter_clk)) {
+		clk_disable_unprepare(info->inter_clk);
 		clk_put(info->inter_clk);
+	}
 
 	dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 }
-- 
2.18.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-04-08  4:59 UTC|newest]

Thread overview: 217+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-08  4:58 [PATCH V2 00/15] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Rex-BC Chen
2022-04-08  4:58 ` Rex-BC Chen
2022-04-08  4:58 ` Rex-BC Chen
2022-04-08  4:58 ` [PATCH V2 01/15] dt-bindings: cpufreq: mediatek: Add MediaTek CCI property Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08  8:10   ` Krzysztof Kozlowski
2022-04-08  8:10     ` Krzysztof Kozlowski
2022-04-08  8:10     ` Krzysztof Kozlowski
2022-04-08 10:24     ` Rex-BC Chen
2022-04-08 10:24       ` Rex-BC Chen
2022-04-08 10:24       ` Rex-BC Chen
2022-04-08 11:49       ` Krzysztof Kozlowski
2022-04-08 11:49         ` Krzysztof Kozlowski
2022-04-08 11:49         ` Krzysztof Kozlowski
2022-04-11  6:48         ` Rex-BC Chen
2022-04-11  6:48           ` Rex-BC Chen
2022-04-11  6:48           ` Rex-BC Chen
2022-04-08  4:58 ` [PATCH V2 02/15] cpufreq: mediatek: Use module_init and add module_exit Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11  3:17     ` Viresh Kumar
2022-04-11  3:17       ` Viresh Kumar
2022-04-11  3:17       ` Viresh Kumar
2022-04-08  4:58 ` [PATCH V2 03/15] cpufreq: mediatek: Cleanup variables and error handling in mtk_cpu_dvfs_info_init() Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11  3:20     ` Viresh Kumar
2022-04-11  3:20       ` Viresh Kumar
2022-04-11  3:20       ` Viresh Kumar
2022-04-08  4:58 ` [PATCH V2 04/15] cpufreq: mediatek: Remove unused headers Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11  3:21     ` Viresh Kumar
2022-04-11  3:21       ` Viresh Kumar
2022-04-11  3:21       ` Viresh Kumar
2022-04-08  4:58 ` Rex-BC Chen [this message]
2022-04-08  4:58   ` [PATCH V2 05/15] cpufreq: mediatek: Enable clocks and regulators Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11  3:22     ` Viresh Kumar
2022-04-11  3:22       ` Viresh Kumar
2022-04-11  3:22       ` Viresh Kumar
2022-04-08  4:58 ` [PATCH V2 06/15] cpufreq: mediatek: Record previous target vproc value Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08  4:58   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11 11:35     ` Rex-BC Chen
2022-04-11 11:35       ` Rex-BC Chen
2022-04-11 11:35       ` Rex-BC Chen
2022-04-11  3:26   ` Viresh Kumar
2022-04-11  3:26     ` Viresh Kumar
2022-04-11  3:26     ` Viresh Kumar
2022-04-11 11:33     ` Rex-BC Chen
2022-04-11 11:33       ` Rex-BC Chen
2022-04-11 11:33       ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 07/15] cpufreq: mediatek: Add opp notification for SVS support Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11 11:31     ` Rex-BC Chen
2022-04-11 11:31       ` Rex-BC Chen
2022-04-08 20:29   ` Kevin Hilman
2022-04-08 20:29     ` Kevin Hilman
2022-04-08 20:29     ` Kevin Hilman
2022-04-11 11:29     ` Rex-BC Chen
2022-04-11 11:29       ` Rex-BC Chen
2022-04-11 18:09       ` Kevin Hilman
2022-04-11 18:09         ` Kevin Hilman
2022-04-11 18:09         ` Kevin Hilman
2022-04-12  8:18         ` Rex-BC Chen
2022-04-12  8:18           ` Rex-BC Chen
2022-04-12 18:04           ` Kevin Hilman
2022-04-12 18:04             ` Kevin Hilman
2022-04-12 18:04             ` Kevin Hilman
2022-04-13 11:21             ` Rex-BC Chen
2022-04-13 11:21               ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 08/15] cpufreq: mediatek: Move voltage limits to platform data Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:36   ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-08 13:36     ` AngeloGioacchino Del Regno
2022-04-11 11:18     ` Rex-BC Chen
2022-04-11 11:18       ` Rex-BC Chen
2022-04-11 11:18       ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 09/15] cpufreq: mediatek: Add .get function Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 10/15] cpufreq: mediatek: Make sram regulator optional Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:37   ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 20:32   ` Kevin Hilman
2022-04-08 20:32     ` Kevin Hilman
2022-04-08 20:32     ` Kevin Hilman
2022-04-14 10:53     ` Rex-BC Chen
2022-04-14 10:53       ` Rex-BC Chen
2022-04-14 10:53       ` Rex-BC Chen
2022-04-14 17:20       ` Kevin Hilman
2022-04-14 17:20         ` Kevin Hilman
2022-04-14 17:20         ` Kevin Hilman
2022-04-08  4:59 ` [PATCH V2 11/15] cpufreq: mediatek: Update logic of voltage_tracking() Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 21:08   ` Kevin Hilman
2022-04-08 21:08     ` Kevin Hilman
2022-04-08 21:08     ` Kevin Hilman
2022-04-14 11:30     ` Rex-BC Chen
2022-04-14 11:30       ` Rex-BC Chen
2022-04-14 11:30       ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 12/15] cpufreq: mediatek: Use maximum voltage in init stage Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:37   ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-12 11:24     ` Rex-BC Chen
2022-04-12 11:24       ` Rex-BC Chen
2022-04-12 11:24       ` Rex-BC Chen
2022-04-14  3:40     ` Rex-BC Chen
2022-04-14  3:40       ` Rex-BC Chen
2022-04-14  3:40       ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 13/15] cpufreq: mediatek: Link CCI device to CPU Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:37   ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-11 11:50     ` Rex-BC Chen
2022-04-11 11:50       ` Rex-BC Chen
2022-04-11 11:50       ` Rex-BC Chen
2022-04-08 20:54   ` Kevin Hilman
2022-04-08 20:54     ` Kevin Hilman
2022-04-08 20:54     ` Kevin Hilman
2022-04-11 11:51     ` Rex-BC Chen
2022-04-11 11:51       ` Rex-BC Chen
2022-04-11 11:51       ` Rex-BC Chen
2022-04-11 12:31     ` Rex-BC Chen
2022-04-11 12:31       ` Rex-BC Chen
2022-04-11 12:31       ` Rex-BC Chen
2022-04-11 18:13       ` Kevin Hilman
2022-04-11 18:13         ` Kevin Hilman
2022-04-11 18:13         ` Kevin Hilman
2022-04-12 12:26         ` Rex-BC Chen
2022-04-12 12:26           ` Rex-BC Chen
2022-04-12 12:26           ` Rex-BC Chen
2022-04-12 18:50           ` Kevin Hilman
2022-04-12 18:50             ` Kevin Hilman
2022-04-12 18:50             ` Kevin Hilman
2022-04-13 11:32             ` Rex-BC Chen
2022-04-13 11:32               ` Rex-BC Chen
2022-04-13 11:32               ` Rex-BC Chen
2022-04-13 21:41               ` Kevin Hilman
2022-04-13 21:41                 ` Kevin Hilman
2022-04-13 21:41                 ` Kevin Hilman
2022-04-14  2:32                 ` Rex-BC Chen
2022-04-14  2:32                   ` Rex-BC Chen
2022-04-14  2:32                   ` Rex-BC Chen
2022-04-14 21:48                   ` Kevin Hilman
2022-04-14 21:48                     ` Kevin Hilman
2022-04-14 21:48                     ` Kevin Hilman
2022-04-15  2:31                     ` Rex-BC Chen
2022-04-15  2:31                       ` Rex-BC Chen
2022-04-15  2:31                       ` Rex-BC Chen
2022-04-19 18:16                       ` Kevin Hilman
2022-04-19 18:16                         ` Kevin Hilman
2022-04-19 18:16                         ` Kevin Hilman
2022-04-08  4:59 ` [PATCH V2 14/15] cpufreq: mediatek: Add support for MT8186 Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:37   ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 21:10   ` Kevin Hilman
2022-04-08 21:10     ` Kevin Hilman
2022-04-08 21:10     ` Kevin Hilman
2022-04-11 11:14     ` Rex-BC Chen
2022-04-11 11:14       ` Rex-BC Chen
2022-04-11 11:14       ` Rex-BC Chen
2022-04-08  4:59 ` [PATCH V2 15/15] cpufreq: mediatek: Use device print to show logs Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08  4:59   ` Rex-BC Chen
2022-04-08 13:37   ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-08 13:37     ` AngeloGioacchino Del Regno
2022-04-11  3:29   ` Viresh Kumar
2022-04-11  3:29     ` Viresh Kumar
2022-04-11  3:29     ` Viresh Kumar
2022-04-11 11:09     ` Rex-BC Chen
2022-04-11 11:09       ` Rex-BC Chen
2022-04-11 11:09       ` Rex-BC Chen
2022-04-08 21:11 ` [PATCH V2 00/15] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Kevin Hilman
2022-04-08 21:11   ` Kevin Hilman
2022-04-08 21:11   ` Kevin Hilman
2022-04-09  1:05   ` Hsin-Yi Wang
2022-04-09  1:05     ` Hsin-Yi Wang
2022-04-09  1:05     ` Hsin-Yi Wang
2022-04-11 11:37     ` Rex-BC Chen
2022-04-11 11:37       ` Rex-BC Chen
2022-04-11 11:37       ` Rex-BC Chen

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