From: frank.chang@sifive.com To: qemu-devel@nongnu.org Cc: Frank Chang <frank.chang@sifive.com>, qemu-riscv@nongnu.org Subject: [PATCH v4 0/4] Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses Date: Wed, 20 Apr 2022 16:08:56 +0800 [thread overview] Message-ID: <20220420080901.14655-1-frank.chang@sifive.com> (raw) From: Frank Chang <frank.chang@sifive.com> This patchset makes ACLINT mtime to be writable as RISC-V privilege spec defines that mtime is exposed as a memory-mapped machine-mode read-write register. Also, mtimecmp and mtime should be 32/64-bit memory accessible registers. ACLINT reset function is also added, which requires mtime to be resetable if we need to support core power-gating feature in the future. This patchset is the updated verion of: https://patchew.org/QEMU/20220126095448.2964-1-frank.chang@sifive.com/ Changelog: v4: * Replace the error log mask for invalid 8-byte timecmp_hi and time_hi writes from LOG_UNIMP to LOG_GUEST_ERROR. v3: * Forbid 8-byte write access to timecmp_hi and time_hi. * Add ACLINT reset function. v2: * Support 32/64-bit mtimecmp/mtime memory accesses. * Add .impl.[min|max]_access_size declaration. Frank Chang (3): hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT hw/intc: Make RISC-V ACLINT mtime MMIO register writable Jim Shu (1): hw/intc: riscv_aclint: Add reset function of ACLINT devices hw/intc/riscv_aclint.c | 144 ++++++++++++++++++++++++++------- include/hw/intc/riscv_aclint.h | 1 + target/riscv/cpu.h | 8 +- target/riscv/cpu_helper.c | 4 +- 4 files changed, 121 insertions(+), 36 deletions(-) -- 2.35.1
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From: frank.chang@sifive.com To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, Frank Chang <frank.chang@sifive.com> Subject: [PATCH v4 0/4] Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses Date: Wed, 20 Apr 2022 16:08:56 +0800 [thread overview] Message-ID: <20220420080901.14655-1-frank.chang@sifive.com> (raw) From: Frank Chang <frank.chang@sifive.com> This patchset makes ACLINT mtime to be writable as RISC-V privilege spec defines that mtime is exposed as a memory-mapped machine-mode read-write register. Also, mtimecmp and mtime should be 32/64-bit memory accessible registers. ACLINT reset function is also added, which requires mtime to be resetable if we need to support core power-gating feature in the future. This patchset is the updated verion of: https://patchew.org/QEMU/20220126095448.2964-1-frank.chang@sifive.com/ Changelog: v4: * Replace the error log mask for invalid 8-byte timecmp_hi and time_hi writes from LOG_UNIMP to LOG_GUEST_ERROR. v3: * Forbid 8-byte write access to timecmp_hi and time_hi. * Add ACLINT reset function. v2: * Support 32/64-bit mtimecmp/mtime memory accesses. * Add .impl.[min|max]_access_size declaration. Frank Chang (3): hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT hw/intc: Make RISC-V ACLINT mtime MMIO register writable Jim Shu (1): hw/intc: riscv_aclint: Add reset function of ACLINT devices hw/intc/riscv_aclint.c | 144 ++++++++++++++++++++++++++------- include/hw/intc/riscv_aclint.h | 1 + target/riscv/cpu.h | 8 +- target/riscv/cpu_helper.c | 4 +- 4 files changed, 121 insertions(+), 36 deletions(-) -- 2.35.1
next reply other threads:[~2022-04-20 8:15 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-20 8:08 frank.chang [this message] 2022-04-20 8:08 ` [PATCH v4 0/4] Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses frank.chang 2022-04-20 8:08 ` [PATCH v4 1/4] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT frank.chang 2022-04-20 8:08 ` frank.chang 2022-04-20 8:08 ` [PATCH v4 2/4] hw/intc: Support 32/64-bit mtimecmp and mtime accesses " frank.chang 2022-04-20 8:08 ` frank.chang 2022-04-20 8:08 ` [PATCH v4 3/4] hw/intc: Make RISC-V ACLINT mtime MMIO register writable frank.chang 2022-04-20 8:08 ` frank.chang 2022-04-20 8:09 ` [PATCH v4 4/4] hw/intc: riscv_aclint: Add reset function of ACLINT devices frank.chang 2022-04-20 8:09 ` frank.chang 2022-04-20 22:40 ` [PATCH v4 0/4] Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses Alistair Francis 2022-04-20 22:40 ` Alistair Francis
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