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From: Corentin Labbe <clabbe@baylibre.com>
To: heiko@sntech.de, herbert@gondor.apana.org.au,
	krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Corentin Labbe <clabbe@baylibre.com>
Subject: [PATCH v6 30/33] crypto: rockchip: Check for clocks numbers and their frequencies
Date: Mon, 25 Apr 2022 20:21:16 +0000	[thread overview]
Message-ID: <20220425202119.3566743-31-clabbe@baylibre.com> (raw)
In-Reply-To: <20220425202119.3566743-1-clabbe@baylibre.com>

Add the number of clocks needed for each compatible.
Rockchip's datasheet give maximum frequencies for some clocks, so add
checks for verifying they are within limits. Let's start with rk3288 for
clock frequency check, other will came later.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
 drivers/crypto/rockchip/rk3288_crypto.c | 75 +++++++++++++++++++++----
 drivers/crypto/rockchip/rk3288_crypto.h | 16 +++++-
 2 files changed, 79 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
index 6147ce44f757..d6d78b8af57c 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -14,10 +14,58 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/crypto.h>
 #include <linux/reset.h>
 
+static const struct rk_variant rk3288_variant = {
+	.num_clks = 4,
+	.rkclks = {
+		{ "sclk", 150000000},
+	}
+};
+
+static const struct rk_variant rk3328_variant = {
+	.num_clks = 3,
+};
+
+static int rk_crypto_get_clks(struct rk_crypto_info *dev)
+{
+	int i, j, err;
+	unsigned long cr;
+
+	dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks);
+	if (dev->num_clks < dev->variant->num_clks) {
+		dev_err(dev->dev, "Missing clocks, got %d instead of %d\n",
+			dev->num_clks, dev->variant->num_clks);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < dev->num_clks; i++) {
+		cr = clk_get_rate(dev->clks[i].clk);
+		for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) {
+			if (dev->variant->rkclks[j].max == 0)
+				continue;
+			if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id))
+				continue;
+			if (cr > dev->variant->rkclks[j].max) {
+				err = clk_set_rate(dev->clks[i].clk,
+						   dev->variant->rkclks[j].max);
+				if (err)
+					dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n",
+						dev->variant->rkclks[j].name, cr,
+						dev->variant->rkclks[j].max);
+				else
+					dev_info(dev->dev, "Downclocking %s from %lu to %lu\n",
+						 dev->variant->rkclks[j].name, cr,
+						 dev->variant->rkclks[j].max);
+			}
+		}
+	}
+	return 0;
+}
+
 static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
 {
 	int err;
@@ -196,8 +244,12 @@ static void rk_crypto_unregister(void)
 }
 
 static const struct of_device_id crypto_of_id_table[] = {
-	{ .compatible = "rockchip,rk3288-crypto" },
-	{ .compatible = "rockchip,rk3328-crypto" },
+	{ .compatible = "rockchip,rk3288-crypto",
+	  .data = &rk3288_variant,
+	},
+	{ .compatible = "rockchip,rk3328-crypto",
+	  .data = &rk3328_variant,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, crypto_of_id_table);
@@ -215,6 +267,15 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
+	crypto_info->dev = &pdev->dev;
+	platform_set_drvdata(pdev, crypto_info);
+
+	crypto_info->variant = of_device_get_match_data(&pdev->dev);
+	if (!crypto_info->variant) {
+		dev_err(&pdev->dev, "Missing variant\n");
+		return -EINVAL;
+	}
+
 	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
 	if (IS_ERR(crypto_info->rst)) {
 		err = PTR_ERR(crypto_info->rst);
@@ -227,12 +288,9 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
-	crypto_info->num_clks = devm_clk_bulk_get_all(&pdev->dev,
-						      &crypto_info->clks);
-	if (crypto_info->num_clks < 3) {
-		err = -EINVAL;
+	err = rk_crypto_get_clks(crypto_info);
+	if (err)
 		goto err_crypto;
-	}
 
 	crypto_info->irq = platform_get_irq(pdev, 0);
 	if (crypto_info->irq < 0) {
@@ -250,9 +308,6 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
-	crypto_info->dev = &pdev->dev;
-	platform_set_drvdata(pdev, crypto_info);
-
 	crypto_info->engine = crypto_engine_alloc_init(&pdev->dev, true);
 	crypto_engine_start(crypto_info->engine);
 	init_completion(&crypto_info->complete);
diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
index ff9fc25972eb..ac979d67ced9 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.h
+++ b/drivers/crypto/rockchip/rk3288_crypto.h
@@ -188,14 +188,26 @@
 #define CRYPTO_WRITE(dev, offset, val)	  \
 		writel_relaxed((val), ((dev)->reg + (offset)))
 
+#define RK_MAX_CLKS 4
+
+struct rk_clks {
+	const char *name;
+	unsigned long max;
+};
+
+struct rk_variant {
+	int num_clks;
+	struct rk_clks rkclks[RK_MAX_CLKS];
+};
+
 struct rk_crypto_info {
 	struct device			*dev;
 	struct clk_bulk_data		*clks;
-	int num_clks;
+	int				num_clks;
 	struct reset_control		*rst;
 	void __iomem			*reg;
 	int				irq;
-
+	const struct rk_variant *variant;
 	struct crypto_engine *engine;
 	struct completion complete;
 	int status;
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: Corentin Labbe <clabbe@baylibre.com>
To: heiko@sntech.de, herbert@gondor.apana.org.au,
	krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Corentin Labbe <clabbe@baylibre.com>
Subject: [PATCH v6 30/33] crypto: rockchip: Check for clocks numbers and their frequencies
Date: Mon, 25 Apr 2022 20:21:16 +0000	[thread overview]
Message-ID: <20220425202119.3566743-31-clabbe@baylibre.com> (raw)
In-Reply-To: <20220425202119.3566743-1-clabbe@baylibre.com>

Add the number of clocks needed for each compatible.
Rockchip's datasheet give maximum frequencies for some clocks, so add
checks for verifying they are within limits. Let's start with rk3288 for
clock frequency check, other will came later.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
 drivers/crypto/rockchip/rk3288_crypto.c | 75 +++++++++++++++++++++----
 drivers/crypto/rockchip/rk3288_crypto.h | 16 +++++-
 2 files changed, 79 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
index 6147ce44f757..d6d78b8af57c 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -14,10 +14,58 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/crypto.h>
 #include <linux/reset.h>
 
+static const struct rk_variant rk3288_variant = {
+	.num_clks = 4,
+	.rkclks = {
+		{ "sclk", 150000000},
+	}
+};
+
+static const struct rk_variant rk3328_variant = {
+	.num_clks = 3,
+};
+
+static int rk_crypto_get_clks(struct rk_crypto_info *dev)
+{
+	int i, j, err;
+	unsigned long cr;
+
+	dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks);
+	if (dev->num_clks < dev->variant->num_clks) {
+		dev_err(dev->dev, "Missing clocks, got %d instead of %d\n",
+			dev->num_clks, dev->variant->num_clks);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < dev->num_clks; i++) {
+		cr = clk_get_rate(dev->clks[i].clk);
+		for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) {
+			if (dev->variant->rkclks[j].max == 0)
+				continue;
+			if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id))
+				continue;
+			if (cr > dev->variant->rkclks[j].max) {
+				err = clk_set_rate(dev->clks[i].clk,
+						   dev->variant->rkclks[j].max);
+				if (err)
+					dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n",
+						dev->variant->rkclks[j].name, cr,
+						dev->variant->rkclks[j].max);
+				else
+					dev_info(dev->dev, "Downclocking %s from %lu to %lu\n",
+						 dev->variant->rkclks[j].name, cr,
+						 dev->variant->rkclks[j].max);
+			}
+		}
+	}
+	return 0;
+}
+
 static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
 {
 	int err;
@@ -196,8 +244,12 @@ static void rk_crypto_unregister(void)
 }
 
 static const struct of_device_id crypto_of_id_table[] = {
-	{ .compatible = "rockchip,rk3288-crypto" },
-	{ .compatible = "rockchip,rk3328-crypto" },
+	{ .compatible = "rockchip,rk3288-crypto",
+	  .data = &rk3288_variant,
+	},
+	{ .compatible = "rockchip,rk3328-crypto",
+	  .data = &rk3328_variant,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, crypto_of_id_table);
@@ -215,6 +267,15 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
+	crypto_info->dev = &pdev->dev;
+	platform_set_drvdata(pdev, crypto_info);
+
+	crypto_info->variant = of_device_get_match_data(&pdev->dev);
+	if (!crypto_info->variant) {
+		dev_err(&pdev->dev, "Missing variant\n");
+		return -EINVAL;
+	}
+
 	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
 	if (IS_ERR(crypto_info->rst)) {
 		err = PTR_ERR(crypto_info->rst);
@@ -227,12 +288,9 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
-	crypto_info->num_clks = devm_clk_bulk_get_all(&pdev->dev,
-						      &crypto_info->clks);
-	if (crypto_info->num_clks < 3) {
-		err = -EINVAL;
+	err = rk_crypto_get_clks(crypto_info);
+	if (err)
 		goto err_crypto;
-	}
 
 	crypto_info->irq = platform_get_irq(pdev, 0);
 	if (crypto_info->irq < 0) {
@@ -250,9 +308,6 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
-	crypto_info->dev = &pdev->dev;
-	platform_set_drvdata(pdev, crypto_info);
-
 	crypto_info->engine = crypto_engine_alloc_init(&pdev->dev, true);
 	crypto_engine_start(crypto_info->engine);
 	init_completion(&crypto_info->complete);
diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
index ff9fc25972eb..ac979d67ced9 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.h
+++ b/drivers/crypto/rockchip/rk3288_crypto.h
@@ -188,14 +188,26 @@
 #define CRYPTO_WRITE(dev, offset, val)	  \
 		writel_relaxed((val), ((dev)->reg + (offset)))
 
+#define RK_MAX_CLKS 4
+
+struct rk_clks {
+	const char *name;
+	unsigned long max;
+};
+
+struct rk_variant {
+	int num_clks;
+	struct rk_clks rkclks[RK_MAX_CLKS];
+};
+
 struct rk_crypto_info {
 	struct device			*dev;
 	struct clk_bulk_data		*clks;
-	int num_clks;
+	int				num_clks;
 	struct reset_control		*rst;
 	void __iomem			*reg;
 	int				irq;
-
+	const struct rk_variant *variant;
 	struct crypto_engine *engine;
 	struct completion complete;
 	int status;
-- 
2.35.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Corentin Labbe <clabbe@baylibre.com>
To: heiko@sntech.de, herbert@gondor.apana.org.au,
	krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Corentin Labbe <clabbe@baylibre.com>
Subject: [PATCH v6 30/33] crypto: rockchip: Check for clocks numbers and their frequencies
Date: Mon, 25 Apr 2022 20:21:16 +0000	[thread overview]
Message-ID: <20220425202119.3566743-31-clabbe@baylibre.com> (raw)
In-Reply-To: <20220425202119.3566743-1-clabbe@baylibre.com>

Add the number of clocks needed for each compatible.
Rockchip's datasheet give maximum frequencies for some clocks, so add
checks for verifying they are within limits. Let's start with rk3288 for
clock frequency check, other will came later.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
 drivers/crypto/rockchip/rk3288_crypto.c | 75 +++++++++++++++++++++----
 drivers/crypto/rockchip/rk3288_crypto.h | 16 +++++-
 2 files changed, 79 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
index 6147ce44f757..d6d78b8af57c 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -14,10 +14,58 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/crypto.h>
 #include <linux/reset.h>
 
+static const struct rk_variant rk3288_variant = {
+	.num_clks = 4,
+	.rkclks = {
+		{ "sclk", 150000000},
+	}
+};
+
+static const struct rk_variant rk3328_variant = {
+	.num_clks = 3,
+};
+
+static int rk_crypto_get_clks(struct rk_crypto_info *dev)
+{
+	int i, j, err;
+	unsigned long cr;
+
+	dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks);
+	if (dev->num_clks < dev->variant->num_clks) {
+		dev_err(dev->dev, "Missing clocks, got %d instead of %d\n",
+			dev->num_clks, dev->variant->num_clks);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < dev->num_clks; i++) {
+		cr = clk_get_rate(dev->clks[i].clk);
+		for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) {
+			if (dev->variant->rkclks[j].max == 0)
+				continue;
+			if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id))
+				continue;
+			if (cr > dev->variant->rkclks[j].max) {
+				err = clk_set_rate(dev->clks[i].clk,
+						   dev->variant->rkclks[j].max);
+				if (err)
+					dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n",
+						dev->variant->rkclks[j].name, cr,
+						dev->variant->rkclks[j].max);
+				else
+					dev_info(dev->dev, "Downclocking %s from %lu to %lu\n",
+						 dev->variant->rkclks[j].name, cr,
+						 dev->variant->rkclks[j].max);
+			}
+		}
+	}
+	return 0;
+}
+
 static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
 {
 	int err;
@@ -196,8 +244,12 @@ static void rk_crypto_unregister(void)
 }
 
 static const struct of_device_id crypto_of_id_table[] = {
-	{ .compatible = "rockchip,rk3288-crypto" },
-	{ .compatible = "rockchip,rk3328-crypto" },
+	{ .compatible = "rockchip,rk3288-crypto",
+	  .data = &rk3288_variant,
+	},
+	{ .compatible = "rockchip,rk3328-crypto",
+	  .data = &rk3328_variant,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, crypto_of_id_table);
@@ -215,6 +267,15 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
+	crypto_info->dev = &pdev->dev;
+	platform_set_drvdata(pdev, crypto_info);
+
+	crypto_info->variant = of_device_get_match_data(&pdev->dev);
+	if (!crypto_info->variant) {
+		dev_err(&pdev->dev, "Missing variant\n");
+		return -EINVAL;
+	}
+
 	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
 	if (IS_ERR(crypto_info->rst)) {
 		err = PTR_ERR(crypto_info->rst);
@@ -227,12 +288,9 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
-	crypto_info->num_clks = devm_clk_bulk_get_all(&pdev->dev,
-						      &crypto_info->clks);
-	if (crypto_info->num_clks < 3) {
-		err = -EINVAL;
+	err = rk_crypto_get_clks(crypto_info);
+	if (err)
 		goto err_crypto;
-	}
 
 	crypto_info->irq = platform_get_irq(pdev, 0);
 	if (crypto_info->irq < 0) {
@@ -250,9 +308,6 @@ static int rk_crypto_probe(struct platform_device *pdev)
 		goto err_crypto;
 	}
 
-	crypto_info->dev = &pdev->dev;
-	platform_set_drvdata(pdev, crypto_info);
-
 	crypto_info->engine = crypto_engine_alloc_init(&pdev->dev, true);
 	crypto_engine_start(crypto_info->engine);
 	init_completion(&crypto_info->complete);
diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
index ff9fc25972eb..ac979d67ced9 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.h
+++ b/drivers/crypto/rockchip/rk3288_crypto.h
@@ -188,14 +188,26 @@
 #define CRYPTO_WRITE(dev, offset, val)	  \
 		writel_relaxed((val), ((dev)->reg + (offset)))
 
+#define RK_MAX_CLKS 4
+
+struct rk_clks {
+	const char *name;
+	unsigned long max;
+};
+
+struct rk_variant {
+	int num_clks;
+	struct rk_clks rkclks[RK_MAX_CLKS];
+};
+
 struct rk_crypto_info {
 	struct device			*dev;
 	struct clk_bulk_data		*clks;
-	int num_clks;
+	int				num_clks;
 	struct reset_control		*rst;
 	void __iomem			*reg;
 	int				irq;
-
+	const struct rk_variant *variant;
 	struct crypto_engine *engine;
 	struct completion complete;
 	int status;
-- 
2.35.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-04-25 20:23 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-25 20:20 [PATCH v6 00/33] crypto: rockchip: permit to pass self-tests Corentin Labbe
2022-04-25 20:20 ` Corentin Labbe
2022-04-25 20:20 ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 01/33] crypto: rockchip: use dev_err for error message about interrupt Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 02/33] crypto: rockchip: do not use uninitialized variable Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 03/33] crypto: rockchip: do not do custom power management Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 04/33] crypto: rockchip: fix privete/private typo Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 05/33] crypto: rockchip: do not store mode globally Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 06/33] crypto: rockchip: add fallback for cipher Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 07/33] crypto: rockchip: add fallback for ahash Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 08/33] crypto: rockchip: better handle cipher key Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 09/33] crypto: rockchip: remove non-aligned handling Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 10/33] crypto: rockchip: rework by using crypto_engine Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 11/33] crypto: rockchip: rewrite type Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 12/33] crypto: rockchip: add debugfs Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20 ` [PATCH v6 13/33] crypto: rockchip: introduce PM Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:20   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 14/33] crypto: rockchip: handle reset also in PM Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 15/33] crypto: rockchip: use clk_bulk to simplify clock management Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 16/33] crypto: rockchip: add myself as maintainer Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 17/33] crypto: rockchip: use read_poll_timeout Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 18/33] crypto: rockchip: fix style issue Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 19/33] crypto: rockchip: add support for rk3328 Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 20/33] crypto: rockchip: rename ablk functions to cipher Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 21/33] crypto: rockchip: rework rk_handle_req function Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 22/33] crypto: rockchip: use a rk_crypto_info variable instead of lot of indirection Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 23/33] crypto: rockchip: use the rk_crypto_info given as parameter Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 24/33] dt-bindings: crypto: convert rockchip-crypto to YAML Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-26  7:13   ` Krzysztof Kozlowski
2022-04-26  7:13     ` Krzysztof Kozlowski
2022-04-26  7:13     ` Krzysztof Kozlowski
2022-04-25 20:21 ` [PATCH v6 25/33] dt-bindings: crypto: rockchip: convert to new driver bindings Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-26  7:17   ` Krzysztof Kozlowski
2022-04-26  7:17     ` Krzysztof Kozlowski
2022-04-26  7:17     ` Krzysztof Kozlowski
2022-04-25 20:21 ` [PATCH v6 26/33] clk: rk3399: use proper crypto0 name Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 27/33] arm64: dts: rockchip: add rk3328 crypto node Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 28/33] arm64: dts: rockchip: rk3399: add " Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 29/33] crypto: rockchip: store crypto_info in request context Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` Corentin Labbe [this message]
2022-04-25 20:21   ` [PATCH v6 30/33] crypto: rockchip: Check for clocks numbers and their frequencies Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 31/33] crypto: rockchip: rk_ahash_reg_init use crypto_info from parameter Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 32/33] crypto: rockchip: permit to have more than one reset Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21 ` [PATCH v6 33/33] crypto: rockchip: Add support for RK3399 Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe
2022-04-25 20:21   ` Corentin Labbe

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