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From: Biju Das <biju.das.jz@bp.renesas.com>
To: Jonathan Cameron <jic23@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Lars-Peter Clausen <lars@metafoo.de>,
	linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	devicetree@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC
Date: Sun,  1 May 2022 09:10:01 +0100	[thread overview]
Message-ID: <20220501081001.21563-1-biju.das.jz@bp.renesas.com> (raw)

Document Renesas RZ/G2UL ADC bindings. RZ/G2UL ADC is identical to
RZ/G2L ADC but with fewer channels (2 vs 8) compared to RZ/G2L.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 .../bindings/iio/adc/renesas,rzg2l-adc.yaml    | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
index d66c24cae1e1..767fb734a1b5 100644
--- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
@@ -17,11 +17,15 @@ description: |
 
 properties:
   compatible:
-    items:
-      - enum:
-          - renesas,r9a07g044-adc   # RZ/G2L
-          - renesas,r9a07g054-adc   # RZ/V2L
-      - const: renesas,rzg2l-adc
+    oneOf:
+      - items:
+          - const: renesas,renesas,r9a07g043-adc   # RZ/G2UL
+
+      - items:
+          - enum:
+              - renesas,r9a07g044-adc   # RZ/G2L
+              - renesas,r9a07g054-adc   # RZ/V2L
+          - const: renesas,rzg2l-adc
 
   reg:
     maxItems: 1
@@ -76,7 +80,9 @@ patternProperties:
     properties:
       reg:
         description: |
-          The channel number. It can have up to 8 channels numbered from 0 to 7.
+          The channel number. It can have up to 8 channels numbered from 0 to 7
+          for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL
+          SoC.
         items:
           - minimum: 0
             maximum: 7
-- 
2.25.1


             reply	other threads:[~2022-05-01  8:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-01  8:10 Biju Das [this message]
2022-05-01  8:37 ` [PATCH] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC Krzysztof Kozlowski
2022-05-01  8:40   ` Biju Das
2022-05-01  9:02     ` Krzysztof Kozlowski

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